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W7100A Datasheet(PDF) 87 Page - WIZnet Co., Ltd

Part # W7100A
Description  Release with W7100 launching
PDF  160 Pages
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Manufacturer  WIZNET [WIZnet Co., Ltd]
Direct Link  https://www.wiznet.io/ko/Product/
Logo WIZNET - WIZnet Co., Ltd

W7100A Datasheet(HTML) 87 Page - WIZnet Co., Ltd

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W7100A Datasheet v1.2.5
87
GAR (Gateway IP Address Register) [R/W] [0xFE0001 – 0xFE0004] [0x00]
This Register sets up the default gateway address.
Ex) In case of “192.168.0.1”
0xFE0001
0xFE0002
0xFE0003
0xFE0004
192 (0xC0)
168 (0xA8)
0 (0x00)
1 (0x01)
SUBR (Subnet Mask Register) [R/W] [0xFE0005 – 0xFE0008] [0x00]
This register sets up the subnet mask address.
Ex) In case of “255.255.255.0”
0xFE0005
0xFE0006
0xFE0007
0xFE0008
255 (0xFF)
255 (0xFF)
255 (0xFF)
0 (0x00)
SHAR (Source Hardware Address Register) [R/W] [0xFE0009 – 0xFE000E] [0x00]
This register sets up the Source Hardware address.
Ex) In case of “00.08.DC.01.02.03”
0xFE0009
0xFE000A
0xFE000B
0xFE000C
0xFE000D
0xFE000E
0x00
0x08
0xDC
0x01
0x02
0x03
SIPR (Source IP Address Register) [R/W] [0xFE000F – 0xFE0012] [0x00]
This register sets up the Source IP address.
Ex) In case of “192.168.0.2”
0xFE000F
0xFE0010
0xFE0011
0xFE0012
192 (0xC0)
168 (0xA8)
0 (0x00)
2 (0x02)
IR (Interrupt Register) [R] [0xFE0015] [0x00]
This register is accessed by the MCU of W7100A to determine the cause of an interrupt. As
long as any IR bit is set, the INT5(nINT5: TCPIPcore interrupt) signal is asserted low, and it
will not go high until all bits is cleared in the Interrupt Register.
7
6
5
4
3
2
1
0
CONFLICT
UNREACH
PPPoE
Reserved
Reserved
Reserved
Reserved
Reserved
Bit
Symbol
Description
7
CONFLICT
IP Conflict
When the ARP request has the same IP address as the Source IP address,
this bit is set as ‘1’. It can be cleared to ‘0’ by writing ‘1’ to this bit.
6
UNREACH
Destination unreachable
W7100A will receive ICMP(Destination Unreachable) packet if non-existing



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