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W7100A Datasheet(PDF) 92 Page - WIZnet Co., Ltd

Part # W7100A
Description  Release with W7100 launching
PDF  160 Pages
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Manufacturer  WIZNET [WIZnet Co., Ltd]
Direct Link  https://www.wiznet.io/ko/Product/
Logo WIZNET - WIZnet Co., Ltd

W7100A Datasheet(HTML) 92 Page - WIZnet Co., Ltd

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W7100A Datasheet v1.2.5
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information is applied to S6_IR. This bit is automatically cleared when
S6_IR is cleared to 0x00 by host.
5
S5_INT
Occurrence of SOCKET 5 Interrupt
When an interrupt occurs at SOCKET 5, it becomes ‘1’. This interrupt
information is applied to S5_IR. This bit is automatically cleared when
S5_IR is cleared to 0x00 by host.
4
S4_INT
Occurrence of SOCKET 4 Interrupt
When an interrupt occurs at SOCKET 4, it becomes ‘1’. This interrupt
information is applied to S4_IR. This bit is automatically cleared when
S4_IR is cleared to 0x00 by host.
3
S3_INT
Occurrence of SOCKET 3 Interrupt
When an interrupt occurs at SOCKET 3, it becomes ‘1’. This interrupt
information is applied to S3_IR. This bit is automatically cleared when
S3_IR is cleared to 0x00 by host.
2
S2_INT
Occurrence of SOCKET 2 Interrupt
When an interrupt occurs at SOCKET 2, it becomes ‘1’. This interrupt
information is applied to S2_IR. This bit is automatically cleared when
S2_IR is cleared to 0x00 by host.
1
S1_INT
Occurrence of SOCKET 1 Interrupt
When an interrupt occurs at SOCKET 1, it becomes ‘1’. This interrupt
information is applied to S1_IR. This bit is automatically cleared when
S1_IR is cleared to 0x00 by host.
0
S0_INT
Occurrence of SOCKET 0 Interrupt
When an interrupt occurs at SOCKET 0, it becomes ‘0’. This interrupt
information is applied to S0_IR. This bit is automatically cleared when
S0_IR is cleared to 0x00 by host.
8.3.2 SOCKET Registers
Sn_MR (SOCKET n Mode Register)[R/W][0xFE4000 + 0x100n][0x0000]
This register configures the protocol type or option of SOCKET n.
7
6
5
4
3
2
1
0
MULTI
ND / MC
P3
P2
P1
P0
Bit
Symbol
Description
7
MULTI
Multicasting
0 : disable Multicasting
1 : enable Multicasting



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