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LTC3884 Datasheet(PDF) 20 Page - Analog Devices |
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LTC3884 Datasheet(HTML) 20 Page - Analog Devices |
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20 / 26 page ![]() LTC7883 20 Rev. 0 For more information www.analog.com Table 6 shows various PWM phase configurations that can be selected with external resistor programming. This RCONFIG pin, as with the LTC3882-1, can also be used to control SYNC output drive for each LTC7883 unit. However, there are more choices here, affording greater flexibility in PolyPhase configurations. For example, to build a four-phase rail, one approach might be to select RTOP of 24.9kΩ and RBOT of 5.76kΩ for PHAS_CFG of Unit A (PCFGA). This programs the phase angles of PWMA0 to 0° and PWMA1 to 180°, relative to the falling edge of SYNC. Unit A is enabled to drive the shared SYNC clock line through the SYNCA pin (open- drain output). For Unit B, RTOP of 10kΩ and RBOT of 15.8kΩ selects phase angles for PWMB0 of 90° and PWMB1 of 270°, configuring SYNCB as an input to accept the master clock from Unit A. The result, when wired as a 4-phase rail as described in PolyPhase Operation and Load Sharing under Applications Information in the LTC3882-1 data sheet, will be four non-overlapping phases operating in quadrature as desired. In this case, either Unit A or Unit B may be defined and wired as the voltage loop master, since this function is independent of clock mastering. Only mix phase selections on PolyPhase rails that have the same maximum duty cycle specified in Table 6. APPLICATIONS INFORMATION Table 6. CFGA/B Resistor Programming RTOP (kΩ) RBOT (kΩ) θSYNC TO θ0 θSYNC TO θ1 MAXIMUM DUTY CYCLE SYNC OUTPUT DISABLED 0 or Open Open From EEPROM From EEPROM See MFR_PWM_CONFIG From EEPROM 10 23.2 135° 315° 87.5% Yes 10 15.8 90° 270° 16.2 20.5 45° 225° 16.2 17.4 0° 180° 20 17.8 120° 300° 83.3% Yes 20 15 60° 240° 20 12.7 0° 180° 20 11 0° 120° 24.9 11.3 135° 315° 87.5% No 24.9 9.09 90° 270° 24.9 7.32 45° 225° 24.9 5.76 0° 180° 24.9 4.32 120° 300° 83.3% No 30.1 3.57 60° 240° 30.1 1.96 0° 180° Open 0 0° 120° |
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