LT3757 datasheet(20/28 Pages) AD

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LT8392

Rev. 0

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APPLICATIONS INFORMATION

Output Capacitance COUT: Discontinuous current shifts

from the input to the output in the boost region. Make

sure that the COUT capacitor network is capable of reduc-

ing the output voltage ripple. The effects of ESR and the

bulk capacitance must be considered when choosing the

right capacitor for a given output ripple voltage. The max-

imum steady state ripple due to charging and discharging

the bulk capacitance is given by:

ΔVCAP(BOOST) =

IOUT(MAX) • VOUT − VIN(MIN)

(

)

COUT • VOUT • f

ΔVCAP(BUCK) =

VOUT • 1−

VOUT

VIN(MAX)

⎛

⎝

⎜

⎞

⎠

⎟

8 •L • f2 • COUT

The maximum steady ripple due to the voltage drop

across the ESR is given by:

ΔVESR(BOOST) =

VOUT •IOUT(MAX)

VIN(MIN)

•ESR

ΔVESR(BUCK) =

VOUT • 1−

VOUT

VIN(MAX)

⎛

⎝

⎜

⎞

⎠

⎟

L • f

•ESR

INTVCC Regulator

An internal P-channel low dropout regulator produces

5V at the INTVCC pin from the VIN supply pin. The INTVCC

powers internal circuitry and gate drivers in the LT8392.

The INTVCC regulator can supply a peak current of 145mA

and must be bypassed to ground with a minimum of

4.7µF ceramic capacitor. Good local bypass is necessary

to supply the high transient current required by MOSFET

gate drivers.

Higher input voltage applications with large MOSFETs

being driven at higher switching frequencies may cause

the maximum junction temperature rating for the LT8392

to be exceeded. The system supply current is normally

dominated by the gate charge current. Additional external

loading of the INTVCC also needs to be taken into account

for the power dissipation calculation. The total LT8392

power dissipation in this case is VIN • IINTVCC, and overall

efficiency is lowered. The junction temperature can be

estimated by using the equation:

TJ = TA + PD •

θJA

where

θJA (in °C/W) is the package thermal resistance.

To prevent maximum junction temperature from being

exceeded, the input supply current must be checked oper-

ating in continuous mode at maximum VIN.

Top Gate MOSFET Driver Supply (CBST1, CBST2)

The top MOSFET drivers, TG1 and TG2, are driven between

their respective SW and BST pin voltages. The boost volt-

ages are biased from floating bootstrap capacitors CBST1

and CBST2, which are normally recharged through both the

external and internal bootstrap diodes when the respec-

tive top MOSFET is turned off. External bootstrap diodes

are recommended because the internal bootstrap diodes

are not always strong enough to refresh top MOSFETs at

2MHz. Both capacitors are charged to the same voltage

as the INTVCC voltage. The bootstrap capacitors CBST1

and CBST2, need to store about 100 times the gate charge

required by the top switches A and D. In most applica-

tions, a 0.1µF to 0.47µF, X5R or X7R dielectric capacitor

is adequate.

Programming VIN UVLO

A resistor divider from VIN to the EN/UVLO pin imple-

ments VIN undervoltage lockout (UVLO). The EN/UVLO

enable falling threshold is set at 1.220V with 13mV hyster-

esis. In addition, the EN/UVLO pin sinks 2.5µA when the

voltage on the pin is below 1.220V. This current provides

user programmable hysteresis based on the value of R1.

The programmable UVLO thresholds are:

VIN(UVLO+) = 1.233V •

+R2

+ 2.5µA •R1

VIN(UVLO−) = 1.220V •

+R2

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