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LTC4012 Datasheet(PDF) 6 Page - Analog Devices |
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LTC4012 Datasheet(HTML) 6 Page - Analog Devices |
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6 / 18 page ![]() LTC2959 6 Rev. 0 For more information www.analog.com PIN FUNCTIONS VDD (Pin 1): Power supply with a 1.8V to 60V operat- ing range. Can be supplied from the battery directly by connecting to the load/charger side of the sense resistor, or by any other regulated voltage within range. Bypass to GND (pin 10) with a 100nF capacitor. When register B2 = 0, the Voltage ADC digitizes the voltage between this pin and GND. SENSEP (Pin 2): Positive Sense Input. This is the non-inverting current-sense input. For high-side sensing, connect SENSEP to the load and charger side of the sense resistor. For low-side sensing, connect to the battery ter- minal side. The common mode voltage is independent from VDD and can range from 0 to 60V. SENSEN (Pin 5): Negative Sense Input. This is the invert- ing current-sense input. For high-side sensing, connect SENSEN to the battery terminal side of the sense resistor. For low-side sensing, connect to the load and charger side. When register B2 = 1, the Voltage ADC digitizes the voltage between this pin and GND. CFP (Pin 3): Filter Capacitor Positive Input. Connect a 470nF capacitor between CFP and CFN. Do not connect anything else to this pin. CFN (Pin 4): Filter Capacitor Negative Input. Connect a 470nF capacitor between CFP and CFN. Do not connect anything else to this pin. SCL (Pin 6): Serial Bus Clock Input. SDA (Pin 7): Serial Bus Data Input and Output. An external pull-up resistor or current source is required. GPIO (Pin 8): General Purpose Input/Output. Can be configured as an SMBus alert output, a charge complete logic input or an analog input to the ADC, via control register bits [4:3]. At power-up, the pin defaults to ADC input mode with a full-scale range of 1.56V. When con- figured for alert functionality, it conforms to the SMBus alert response protocol and behaves as an open-drain logic output that pulls to GND when any threshold register value is exceeded. When configured as a charge complete input, connect to the charge complete output from the battery charger circuit. A low level at this pin sets the value of the ACR (registers D,E,F, G) to FFFFFFFFh. In ADC input mode, when used to digitize a signal with a high source impedance, connect a 100nF bypass capacitor between GPIO and GND. VREG (Pin 9): Voltage Regulator Output. Bypass with a 1µF capacitor to GND (Pin 10). Do not connect anything else to this pin. GND (Pin 10): Device Ground. For high-side sensing, con- nect directly to the negative battery terminal. For low-side sensing, connect to the load and charger side of the sense resistor. Exposed Pad (Pin 11): Do not connect this pad. For optimal performance, do not solder the exposed pad to the PCB. |
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