LTC4012 datasheet(16/18 Pages) AD

16 / 18 page

LTC2959

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

The state of the GPIO pin and the internal Alert pull-down

signal have no effect on the Status register. The status

bits are set upon the arrival of an alert event, and they are

cleared upon readout of the status register.

Internal Data RW/I2C Arbitration

When I2C communication coincides with the ADC fin-

ishing a conversion or its accumulated charge register

incrementing/decrementing, there is a potential risk of

reading out corrupted data. To prevent this, the LTC2959

independently masks the internal updating of the ACR

and each of the ADC output registers when they are

being read out via I2C. Use burst reads to ensure that

all bytes of a quantity of interest are read out in a single

I2C transaction. Use burst writes for all threshold/min/

max registers to ensure that their comparisons take place

using the full data.

Upon receiving an I2C stop command, the LTC2959 will

release the register masking. If at least one new conver-

sion result has been received internally during I2C com-

munication, the latest conversion result will immediately

be loaded into the corresponding register, ready for I2C

readout.

The min/max trackers and threshold comparators will

function regardless of I2C communication.

PCB Board Layout Suggestions

Keep all traces as short as possible to minimize noise and

inaccuracy. Use a 4-wire Kelvin sense connection for the

sense resistor, locating the LTC2959 close to the resistor

with short sense-traces to the SENSEP and SENSEN pins.

Use wider traces from the resistor to the battery, load and/

or charger. Place the bypass capacitors on VDD and VREG

close to the LTC2959. Place the filter capacitor across CFP

and CFN between the sense resistor and the LTC2959. To

minimize leakage, do not solder the exposed pad.

Figure 3. Kelvin Connection on Sense Resistor

LTC2959

2959 F03

TO CHARGER/LOAD

TO BATTERY

RSENSE

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