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AM2732 Datasheet(PDF) 29 Page - Texas Instruments |
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AM2732 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 97 page ![]() Table 6-1. Pin Attributes (ZCE285A Package) (continued) BALL NUMBER[1] PAD NAME[2] BALL NAME[3] SIGNAL NAME[4] [10] PINCNTL ADDRESS[5] MUX MODE[6] [10] TYPE[7] BALL RESET STATE[8] PULL TYPE[9] RSVD 6 RSVD RCSS_MCASPA_DAT12 7 IO RCSS_MCASPA_DAT4 8 IO RSVD 9 RSVD RSVD 10 RSVD RSVD 11 RSVD RCSS_GPIO_50 12 IO A15 PADDX NRESET_FE2 MSS_GPIO_19 0x020C 0194 0 IO Output Disabled Pull Down RSVD 1 RSVD RSVD 2 RSVD RCSS_I2CA_SDA 3 IO RSVD 4 RSVD RSVD 5 RSVD RSVD 6 RSVD RCSS_MCASPA_DAT13 7 IO RCSS_MCASPA_DAT5 8 IO RSVD 9 RSVD RSVD 10 RSVD RSVD 11 RSVD RCSS_GPIO_51 12 IO B14 PADDY NWARMRESET_IN_FE1 MSS_GPIO_20 0x020C 0198 0 IO Output Disabled Pull Down RSVD 1 RSVD RSVD 2 RSVD RCSS_I2CA_SCL 3 IO RSVD 4 RSVD RSVD 5 RSVD RSVD 6 RSVD RCSS_MCASPA_DAT14 7 IO RCSS_MCASPA_DAT6 8 IO RSVD 9 RSVD RSVD 10 RSVD RSVD 11 RSVD RCSS_GPIO_52 12 IO C13 PADDZ NWARMRESET_IN_FE2 MSS_GPIO_21 0x020C 019C 0 IO Output Disabled Pull Down RSVD 1 RSVD RSVD 2 RSVD RSVD 3 RSVD RCSS_ECAPA_CAPIN_PWMO 4 O RSVD 5 RSVD RSVD 6 RSVD RCSS_MCASPA_DAT15 7 IO RCSS_MCASPA_DAT7 8 IO RSVD 9 RSVD RSVD 10 RSVD RSVD 11 RSVD RCSS_GPIO_53 12 IO The MSS_IOMUX registers contol the individual pin states and MUX mapping described in Table 6-1. The following Table 6-2 provides a reference for these registers and power on reset values. For more information on programming the MSS_IOMUX registers, see the device-specific TRM. www.ti.com AM2732, AM2732-Q1 SWRS245A – DECEMBER 2021 – REVISED FEBRUARY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: AM2732 AM2732-Q1 |
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