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A5000 Datasheet(PDF) 11 Page - NXP Semiconductors |
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A5000 Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 26 page ![]() NXP Semiconductors A5000 Edge Lock Secure Authenticator 8 Pinning information 8.1 Pinning 8.1.1 Pinning HX2QFN20 terminal 1 index area Transparent top view 15 14 13 12 11 VOUT r.f.u r.f.u. VIN ENA 1 2 3 4 5 r.f.u. n.c. r.f.u. n.c. n.c. A5000 aaa-041926 Figure 4. Pin configuration for HX2QFN20 (SOT1969-1) Note: Terminal 1 index area is marked on the bottom with a notch on the center pad and on the top with a printed dot. Symbol Pin Description r.f.u. 1 Connect to VSS n.c. 2 Not connected r.f.u. 3 Connect to VCC n.c. 4 Not connected n.c. 5 Not connected n.c. 6 Not connected n.c. 7 Not connected n.c. 8 Not connected I2C_SDA 9 I2C target data, if not used n.c. I2C_SCL 10 I2C target clock, if not used n.c. ENA 11 Deep Power-down mode enable, if not used then connect to VCC VIN 12 Power supply voltage input for I2C pads and logic supply in case Deep Power-down mode is used r.f.u. 13 Connect to VCC r.f.u 14 Connect to VSS Table 9. Pin description HX2QFN20 A5000 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved. Product data sheet Rev. 1.0 — 28 March 2022 667609 11 / 26 |
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