MPC8308 datasheet(34/95 Pages) NXP

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MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 4

Freescale Semiconductor

PCI Express

10.2.4.1

Spread Spectrum Clock

SD_REF_CLK/SD_REF_CLK are not intended to be used with, and should not be clocked by, a spread

spectrum clock source.

10.3

SerDes Transmitter and Receiver Reference Circuits

This figure shows the reference circuits for SerDes data lane’s transmitter and receiver.

Figure 26. SerDes Transmitter and Receiver Reference Circuits

The DC and AC specification of SerDes data lanes are defined in Section 11, “PCI Express.”

Note that external AC coupling capacitor is required for the PCI Express serial transmission protocol with

the capacitor value defined in specification of PCI Express protocol section.

11 PCI Express

This section describes the DC and AC electrical specifications for the PCI Express bus.

11.1

DC Requirements for PCI Express SD_REF_CLK and

SD_REF_CLK

For more information, see Section 10.2, “SerDes reference clocks.”

11.2

AC Requirements for PCI Express SerDes Clocks

This table lists the PCI Express SerDes clock AC requirements.

Table 33. SD_REF_CLK and SD_REF_CLK AC Requirements

Symbol

Parameter Description

Min

Typ

Max

Units

Notes

tREF

REFCLK cycle time (for 125 MHz and 100 MHz)

—

tREFCJ

REFCLK cycle-to-cycle jitter. Difference in the period

of any two adjacent REFCLK cycles.

——

100

—

tREFPJ

Phase jitter. Deviation in edge location with respect to

mean edge location.

–50

—



Receiver

Transmitter

TXn

RXn



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