ADSP-SC595 datasheet(89/134 Pages) AD

89 / 134 page

Rev. PrD

Page 89 of 134

May 2022

ADSP-SC595/SC596/SC598

Preliminary Technical Data

SPI Port—Open Drain Mode (ODM) Timing

In Figure 23 and Figure 24, the outputs can be SPIx_MOSI, SPIx_MISO, SPIx_D2, and/or SPIx_D3, depending on the mode of operation.

CPOL and CPHA are configuration bits in the SPI_CTL register.

Table 53. SPI Port—ODM Master Mode Timing1

1 All specifications apply to all three SPIs.

All specifications are based on simulation data and are subject to change without notice.

Parameter

Min

Max

Unit

Switching Characteristics

tHDSPIODMM

SPIx_CLK Edge to High Impedance From Data Out Valid

–1.5

tDDSPIODMM

SPIx_CLK Edge to Data Out Valid From High Impedance

Figure 23. ODM Master Mode

Table 54. SPI Port—ODM Slave Mode1

1 All specifications apply to all three SPIs.

All specifications are based on simulation data and are subject to change without notice.

Parameter

Min

Max

Unit

Timing Requirements

tHDSPIODMS

SPIx_CLK Edge to High Impedance From Data Out Valid

tDDSPIODMS

SPIx_CLK Edge to Data Out Valid From High Impedance

SPIx_CLK

(CPOL = 0)

tHDSPIODMM

SPIx_CLK

(CPOL = 1)

tDDSPIODMM

tHDSPIODMM

OUTPUT

(CPHA = 1)

OUTPUT

(CPHA = 0)

ADSP-SC595 Datasheet(PDF) 89 Page - Analog Devices

ADSP-SC595 Datasheet(HTML) 89 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL