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MPC5643L Datasheet(PDF) 106 Page - NXP Semiconductors |
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MPC5643L Datasheet(HTML) 106 Page - NXP Semiconductors |
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106 / 136 page ![]() MPC5643L Microcontroller Data Sheet, Rev. 10 Electrical characteristics NXP Semiconductors 106 3.19.4 Reset sequence — start condition The impact of the voltage thresholds on the starting point of the internal reset sequence are becoming important if the voltage rails / signals ramp up with a very slow slew rate compared to the overall reset sequence duration. 3.19.4.1 Destructive reset Figure 17 shows the voltage threshold that determines the start of the Destructive Reset Sequence, BIST enabled and the start for the Destructive Reset Sequence, BIST disabled. Figure 17. Reset sequence start for Destructive Resets 3.19.4.2 External reset via RESET Figure 18 shows the voltage thresholds that determine the start of the reset sequences initiated by the assertion of RESET as specified in Table 32. 4 If RESET is configured for long reset (default) and if BIST is enabled via chip configuration data stored in the shadow sector of the NVM. 5 If RESET is configured for long reset (default) and if BIST is disabled via chip configuration data stored in the shadow sector of the NVM. 6 If RESET is configured for short reset 7 Internal reset sequence can only be observed by state of RESET if bidirectional RESET functionality is enabled for the functional reset source which triggered the reset sequence. Table 33. Voltage Thresholds Variable name Value Vmin Refer to Table 18 Vmax Refer to Table 18 Supply Rail VDD_HV_PMU TReset, max starts here TReset, min starts here Supply Rail Vmax t V Vmin |
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