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MPC5643L Datasheet(PDF) 103 Page - NXP Semiconductors

Part # MPC5643L
Description  MPC5643L Microcontroller Data Sheet
PDF  136 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MPC5643L Datasheet(HTML) 103 Page - NXP Semiconductors

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Electrical characteristics
MPC5643L Microcontroller Data Sheet, Rev. 10
NXP Semiconductors
103
conditions as well as the reset trigger mapping to the different reset sequences is specified in Section 3.19.3, Reset sequence
trigger mapping.
With the beginning of DRUN mode the first instruction is fetched and executed. At this point application execution starts and
the internal reset sequence is finished.
The figures below show the internal states of the chip during the execution of the reset sequence and the possible states of the
signal pin RESET.
NOTE
RESET is a bidirectional pin. The voltage level on this pin can either be driven low by an
external reset generator or by the chip internal reset circuitry. A high level on this pin can
only be generated by an external pull up resistor which is strong enough to overdrive the
weak internal pull down resistor. The rising edge on RESET in the following figures
indicates the time when the device stops driving it low. The reset sequence durations given
in table Table 31 are applicable only if the internal reset sequence is not prolonged by an
external reset generator keeping RESET asserted low beyond the last PHASE3.
Figure 12. Destructive Reset Sequence, BIST enabled
Figure 13. Destructive Reset Sequence, BIST disabled
PHASE3
BIST
PHASE1,2
PHASE0
PHASE1,2
PHASE3
Establish IRC
and PWR
Flash init
Device
Config
Self Test
Setup
DRUN
LBIST
MBIST
Flash init
Device
Config
Application
Execution
TDRB, min < TReset < TDRB, max
Reset Sequence Start Condition
Reset Sequence Trigger
RESET_B
RESET
PHASE3
PHASE1,2
PHASE0
Establish IRC
and PWR
Flash init
Device
Config
DRUN
Application
Execution
TDR, min < TReset < TDR, max
Reset Sequence Trigger
Reset Sequence Start Condition
RESET_B
RESET



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