MPC5674F datasheet(43/132 Pages) NXP

43 / 132 page

Electrical Characteristics

MPC5674F Microcontroller Data Sheet, Rev. 11

NXP Semiconductors

2 Up to the maximum frequency rating of the device (refer to Table 1). The f

sys speed is the nominal maximum frequency.

270 Mhz parts allow for 264 Mhz system clock + 2% FM.

3 See the MPC5674F Reference Manual for full description as not all bit combinations are valid.

4 EBI/Calibration bus is not available in all packages.

5 The EBI/Calibration Bus operating frequency, f

ebi_cal , depends on clock divider settings of block’s max allowed

frequency of operation. Normally febi_cal =fplatf /2, but can be limited to < fplatf /2 in Full Mode.

Table 29. IPCLKDIV Settings

SIU_SYSDIV

[IPCLKDIV[0:1]]

Mode

Description

Enhanced

CPU frequency is doubled (Max 264Mhz). Platform,

peripheral, and eTPU clocks are 1/2 of CPU frequency

Full

CPU and eTPU frequency is doubled (Max 200Mhz).

Platform and peripheral clocks are 1/2 of CPU frequency.

—

Reserved

Legacy

CPU, eTPU, platform, and peripheral’s clocks all run at

same speed (Max 132Mhz).

Table 30. SYSCLKDIV Settings

SIU_SYSDIV

[SYSCLKDIV[0:1]]

Description

Divide by 2.

Divide by 4.

Divide by 8.

Divide by 16.

MPC5674F Datasheet(PDF) 43 Page - NXP Semiconductors