NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271)

.

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

EXAMPLE BOARD LAYOUT

4225900/A 06/2020

www.ti.com

WQFN - 0.8 mm max height

RTE0020A

PLASTIC QUAD FLATPACK- NO LEAD

SYMM

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 20X

EXPOSED

METAL

METAL

SOLDER MASK

OPENING

0.07 MAX

ALL AROUND

SOLDER MASK DETAILS

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK

DEFINED

EXPOSED

METAL

METAL UNDER

SOLDER MASK

SOLDER MASK

OPENING

0.07 MIN

ALL AROUND

4X (0.175)

4X (0.175)

4X (0.575)

4X (0.575)

16X (0.6)

16X (0.25)

8X (0.4625)

12X (0.5)

(SQ 1.4)

(2.8)

(2.8)

2X (0.45)

2X (0.45)

(2.825)

(2.825)

1

4

5

6

9

10

11

14

15

16

19

20

21

(Ø 0.2) VIA

TYP

(R 0.05) TYP