| Electronic Components Datasheet Search |
|
PCA9506DGG Datasheet(PDF) 7 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PCA9506DGG Datasheet(HTML) 7 Page - NXP Semiconductors |
|
7 / 30 page ![]() 9397 750 14939 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 14 February 2006 7 of 30 Philips Semiconductors PCA9506 40-bit I2C-bus I/O port with RESET, OE, and INT [1] HVQFN package die supply ground is connected to both VSS pins and exposed center pad. VSS pins must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the printed-circuit board in the thermal pad region. 7. Functional description Refer to Figure 1 “Block diagram of PCA9506” and Figure 2 “Simplified schematic of IO0_0 to IO4_7”. 7.1 Device address Following a START condition, the bus master must send the address of the slave it is accessing and the operation it wants to perform (read or write). The address of the PCA9506 is shown in Figure 5. Slave address pins A2, A1, and A0 choose 1 of 8 slave addresses and need to be connected to VDD (1) or VSS (0). To conserve power, no internal pull-up resistors are incorporated on A2, A1, and A0. The last bit of the first byte defines the operation to be performed. When set to logic 1 a read is selected, while a logic 0 selects a write operation. 7.2 Command register Following the successful acknowledgement of the slave address + R/W bit, the bus master will send a byte to the PCA9506, which will be stored in the Command register. OE 30 23 I active LOW output enable input INT 55 48 O active LOW interrupt output RESET 56 49 I active LOW reset input Table 2: Pin description …continued Symbol Pin Type Description TSSOP56 HVQFN56 Fig 5. PCA9506 address 002aab494 0 1 0 0 A2 A1 A0 R/W fixed slave address programmable Fig 6. Command register 002aab495 1 0 0 0 0 0 0 0 AI − D5 D4 D3 D2 D1 D0 Auto-Increment register number default at power-up or after RESET |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |