PCA9506DGG datasheet(11/30 Pages) PHILIPS

11 / 30 page

9397 750 14939

Product data sheet

Rev. 01 — 14 February 2006

11 of 30

Philips Semiconductors

PCA9506

40-bit I2C-bus I/O port with RESET, OE, and INT

7.3.2 OP0 to OP4 - Output Port registers

These registers reﬂect the outgoing logic levels of the pins deﬁned as outputs by the

I/O Conﬁguration register. Bit values in these registers have no effect on pins deﬁned as

inputs. In turn, reads from these registers reﬂect the values that are in the ﬂip-ﬂops

controlling the output selection, not the actual pin values.

Ox[y] = 0: IOx_y = 0 if IOx_y deﬁned as output (Cx[y] in IOC register = 0).

Ox[y] = 1: IOx_y = 1 if IOx_y deﬁned as output (Cx[y] in IOC register = 0).

Where ‘x’ refers to the bank number (0 to 4); ‘y’ refers to the bit number (0 to 7).

7.3.3 PI0 to PI4 - Polarity Inversion registers

These registers allow inversion of the polarity of the corresponding Input Port register.

Px[y] = 0: The corresponding Input Port register data polarity is retained.

Px[y] = 1: The corresponding Input Port register data polarity is inverted.

Where ‘x’ refers to the bank number (0 to 4); ‘y’ refers to the bit number (0 to 7).

Table 5:

OP0 to OP4 - Output Port registers (address 08h to 0Ch) bit description

Legend: * default value.

Address

Bit

Symbol

Access

Value

Description

08h

OP0

7 to 0

O0[7:0]

R/W

0000 0000*

Output Port register bank 0

09h

OP1

7 to 0

O1[7:0]

R/W

0000 0000*

Output Port register bank 1

0Ah

OP2

7 to 0

O2[7:0]

R/W

0000 0000*

Output Port register bank 2

0Bh

OP3

7 to 0

O3[7:0]

R/W

0000 0000*

Output Port register bank 3

0Ch

OP4

7 to 0

O4[7:0]

R/W

0000 0000*

Output Port register bank 4

Table 6:

PI0 to PI4 - Polarity Inversion registers (address 10h to 14h) bit description

Legend: * default value.

Address

Bit

Symbol

Access

Value

Description

10h

PI0

7 to 0

P0[7:0]

R/W

0000 0000*

Polarity Inversion register bank 0

11h

PI1

7 to 0

P1[7:0]

R/W

0000 0000*

Polarity Inversion register bank 1

12h

PI2

7 to 0

P2[7:0]

R/W

0000 0000*

Polarity Inversion register bank 2

13h

PI3

7 to 0

P3[7:0]

R/W

0000 0000*

Polarity Inversion register bank 3

14h

PI4

7 to 0

P4[7:0]

R/W

0000 0000*

Polarity Inversion register bank 4

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