ADUM3471ARSZ datasheet(25/36 Pages) AD

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Data Sheet

ADuM3470/ADuM3471/ADuM3472/ADuM3473/ADuM3474

APPLICATIONS INFORMATION

The dc-to-dc converter section of the ADuM347x uses a

secondary side controller architecture with isolated pulse-width

modulation (PWM) feedback. VDD1 power is supplied to an oscillat-

ing circuit that switches current to the primary side of an external

power transformer using internal push-pull switches at the X1

and X2 pins. Power transferred to the secondary side of the trans-

former is full wave rectified with external Schottky diodes (D1

and D2), filtered with the L1 inductor and COUT capacitor, and

regulated to the isolated power supply voltage from 3.3 V to 15 V.

The secondary (VISO) side controller regulates the output using

a feedback voltage, VFB, from a resistor divider on the output to

create a PWM control signal that is sent to the primary (VDD1) side

by a dedicated iCoupler data channel labeled VFB. The primary side

PWM converter varies the duty cycle of the X1 and X2 switches

to modulate the oscillator circuit and control the power being

sent to the secondary side. This feedback allows for significantly

higher power and efficiency.

The ADuM347x devices implement undervoltage lockout

(UVLO) with hysteresis on the VDDA power input. This feature

ensures that the converter does not go into oscillation due to

noisy input power or slow power-on ramp rates.

A minimum load current of 10 mA is recommended to ensure

optimum load regulation. Smaller loads can generate excess noise

on the output due to short or erratic PWM pulses. Excess noise

generated in this way can cause regulation problems in some

circumstances.

APPLICATION SCHEMATICS

The ADuM347x devices have three main application schematics,

as shown in Figure 38 to Figure 40. Figure 38 has a center-tapped

secondary and two Schottky diodes that provide full wave

rectification for a single output, typically for power supplies of

3.3 V, 5 V, 12 V, and 15 V. For single supplies when VISO = 3.3 V

or 5 V, VREG, VDD2, and VISO can be connected together.

Figure 39 shows a voltage doubling circuit that can be used for a

single supply with an output that exceeds 15 V; 15 V is the largest

supply that can be connected to the regulator input, VREG (Pin 20).

In the circuit shown in Figure 39, the output voltage can be as high

as 24 V, and the voltage at the VREG pin can be as high as 12 V.

When using the circuit shown in Figure 39 to obtain an output

voltage lower than 10 V (for example, VDD1 = 3.3 V, VISO = 5 V),

connect VREG to VISO directly.

Figure 40, which also uses a voltage doubling secondary circuit,

is an example of a coarsely regulated, positive power supply and

an unregulated, negative power supply for outputs of approxi-

mately ±5 V, ±12 V, and ±15 V.

For all the circuits shown in Figure 38 to Figure 40, the isolated

output voltage (VISO) can be set with the voltage dividers, R1

and R2 (values 1 kΩ to 100 kΩ) using the following equation:

VISO = VFB × (R1 + R2)/R2

where VFB is the internal feedback voltage (approximately 1.25 V).

ADuM3470/

ADuM3471/

ADuM3472/

ADuM3473/

ADuM3474

1 X1

2 GND1

3 NC

4 X2

5 VIA/VOA

6 VIB/VOB

7 VIC/VOC

8 VID/VOD

9 VDDA

10 GND1

20 VREG

19 GND2

18 VDD2

17 FB

16 VIA/VOA

15 VIB/VOB

14 VIC/VOC

13 VID/VOD

12 OC

11 GND2

COUT

VDD1

0.1µF

CIN

0.1µF

+5V

ROC

VFB

VISO = VFB × (R1 + R2)/R2

FOR VISO = 3.3V OR 5V, CONNECT VREG, VDD2, AND VISO.

VISO =

+3.3V

TO +15V

47µF

47µH

100kΩ

Figure 38. Single Power Supply

ADuM3470/

ADuM3471/

ADuM3472/

ADuM3473/

ADuM3474

COUT1

COUT2

VDD1

0.1µF

CIN

0.1µF

+5V

VFB

ROC

VISO = VFB × (R1 + R2)/R2

FOR VISO = 15V OR LESS, VREG CAN CONNECT TO VISO.

VISO =

+12V TO

+24V

UNREGULATED

+6V TO

+12V

100kΩ

47µH

47µF

1 X1

2 GND1

3 NC

4 X2

5 VIA/VOA

6 VIB/VOB

7 VIC/VOC

8 VID/VOD

9 VDDA

10 GND1

20 VREG

19 GND2

18 VDD2

17 FB

16 VIA/VOA

15 VIB/VOB

14 VIC/VOC

13 VID/VOD

12 OC

11 GND2

Figure 39. Doubling Power Supply

ADuM3470/

ADuM3471/

ADuM3472/

ADuM3473/

ADuM3474

COUT1

COUT2

VDD1

0.1µF

CIN

0.1µF

+5V

ROC

VFB

VISO = VFB × (R1 + R2)/R2

VISO =

COARSELY

REGULATED

+5V TO +15V

UNREGULATED

–5V TO –15V

47µF

47µH

47µF

100kΩ

1 X1

2 GND1

3 NC

4 X2

5 VIA/VOA

6 VIB/VOB

7 VIC/VOC

8 VID/VOD

9 VDDA

10 GND1

20 VREG

19 GND2

18 VDD2

17 FB

16 VIA/VOA

15 VIB/VOB

14 VIC/VOC

13 VID/VOD

12 OC

11 GND2

Figure 40. Positive Supply and Unregulated Negative Supply

Rev. B | Page 25 of 36

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