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PIC16F616-E/ML Datasheet(PDF) 47 Page - Cirrus Logic |
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PIC16F616-E/ML Datasheet(HTML) 47 Page - Cirrus Logic |
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47 / 172 page  © 2006 Microchip Technology Inc. Preliminary DS41288A-page 45 PIC16F616/16HV616 TABLE 6-1: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER1 Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets CM2CON0 C2ON C2OUT C2OE C2POL — C2R C2CH1 C2CH0 0000 -000 0000 -000 CM2CON1 MC1OUT MC2OUT —T1ACS C1HYS C2HYS T1GSS C2SYNC 00-0 0010 00-0 0010 INTCON GIE PEIE T0IE INTE RAIE T0IF INTF RAIF 0000 0000 0000 0000 PIE1 — ADIE CCP1IE C2IE C1IE — TMR2IE TMR1IE -000 0-00 -000 0-00 PIR1 — ADIF CCP1IF C2IF C1IF — TMR2IF TMR1IF -000 0-00 -000 0-00 TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu T1CON T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 uuuu uuuu Legend: x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the Timer1 module. |
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