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LTC7891 Datasheet(PDF) 21 Page - Analog Devices |
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LTC7891 Datasheet(HTML) 21 Page - Analog Devices |
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21 / 36 page ![]() Data Sheet LTC7891 APPLICATIONS INFORMATION analog.com Rev. 0 | 21 of 36 SELECTING THE LIGHT LOAD OPERATING MODE The LTC7891 can be set to enter high efficiency Burst Mode opera- tion, constant frequency pulse skipping mode, or forced continuous conduction mode at light load currents. To select Burst Mode operation, tie the MODE pin to GND. To select forced continuous operation, tie the MODE pin to INTVCC. To select pulse skipping mode, tie the MODE pin to INTVCC through a 100 kΩ resistor. An internal 100 kΩ resistor from the MODE pin to GND selects Burst Mode if the pin is floating. When synchronized to an external clock through the PLLIN/SPREAD pin, the LTC7891 operates in pulse skipping mode if it is selected. Otherwise, the LTC7891 operates in forced continuous mode. Table 5 summarizes the use of the MODE pin to select the light load operating mode. Table 5. Using the MODE Pin to Select Light Load Operating Mode MODE Pin Light Load Operating Mode Mode When Synchronized 0 V or Floating Burst Mode Forced continuous 100 kΩ to INTVCC Pulse skipping Pulse skipping INTVCC Forced continuous Forced continuous The requirements of each application dictate the appropriate choice for light load operating mode. In Burst Mode operation, the inductor current is not allowed to reverse. The reverse current comparator turns off the bottom FET before the inductor current reaches zero, preventing it from reversing and going negative. Therefore, the regulator operates in discontinuous operation. In addition, when the load current is light, the inductor current begins bursting at frequencies lower than the switching frequency and enters a low current sleep mode when not switching. As a result, Burst Mode operation has the highest possible efficiency at light loads. In forced continuous mode, the inductor current is allowed to re- verse at light loads and switches at the same frequency regardless of the load. In this mode, the efficiency at light loads is considerably lower than in Burst Mode operation. However, continuous operation has the advantage of lower output voltage ripple and less interfer- ence to audio circuitry. In forced continuous mode, the output ripple is independent of the load current. In pulse skipping mode, constant frequency operation is maintained down to approximately 1% of the designed maximum output cur- rent. At very light loads, the PWM comparator can remain tripped for several cycles and force the top FET to remain off for the same number of cycles (that is, skipping pulses). The inductor current is not allowed to reverse (discontinuous operation). This mode, like forced continuous operation, exhibits low output ripple as well as low audio noise and reduced RF interference compared to Burst Mode operation. Pulse skipping mode provides higher light load efficiency than forced continuous mode, but not nearly as high as Burst Mode operation. Consequently, pulse skipping mode rep- resents a compromise between light load efficiency, output ripple, and EMI. In some applications, it may be desirable to change the light load operating mode based on the conditions present in the system. For example, if a system is inactive, the user can select high efficiency Burst Mode operation by keeping the MODE pin set to 0 V. When the system wakes, the user can send an external clock to PLLIN/ SPREAD, or tie MODE to INTVCC to switch to low noise forced continuous mode. These on-the-fly mode changes can allow an individual application to benefit from the advantages of each light load operating mode. DEAD TIME CONTROL (DTCA AND DTCB PINS) The dead time delays of the LTC7891 can be adjusted from near zero to 60 ns by configuring the DTCA pin and DTCB pin. Refer to Figure 40, Figure 41, and Figure 42, which show the TG minus SW, BG, and SW waveforms for each DTCx pin setting. In the DTCx Pins Tied to GND (Adaptive Dead Time Control), DTCx Pins Tied to INTVCC (Smart Near Zero Dead Time Control), and DTCx Pins Connected with a Resistor to GND sections, TG represents the voltage sensed at the top FET gate (the threshold for TG falling is sensed at the TGUP pin), and BG represents the voltage sensed at the bottom FET gate (the thresholds for BG rising and falling are sensed at the BGDN and BGUP pins, respectively). The SW waveforms represent operation in continuous conduction mode with positive inductor current. The DTCA pin programs the dead time associated with the bottom FET turning off and the top FET turning on (SW transitioning from low to high). The DTCB pin programs the dead time associated with top FET turning off and the bottom FET turning on (SW transitioning from high to low). DTCx Pins Tied to GND (Adaptive Dead Time Control) Tying the DTCA pin and DTCB pin to GND programs adaptive dead time control. In adaptive control (see Figure 40), the dead time is measured between one FET turning off and the other FET turning on. Tying the DTCA pin to GND fixes the delay between BG going low and TG minus SW going high to approximately 20 ns. Tying the DTCB pin to GND fixes the delay between TG minus SW falling and BG rising to approximately 20 ns. Figure 40. DTCx Pins Tied to GND–Adaptive Dead Time Control |
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