TMP126 datasheet(20/48 Pages) TI

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8.5.2.2 Communication

Communication is initiated by taking the CS pin low and clocking the SCLK pin. The first 16 bits of the

communication are the command word for the TMP126-Q1. The following data will depend on the command

byte. If a write command is issued, the TMP126-Q1 will store the data input during the next 16 bits into the

appropriate Sub-Address set in the command byte. If the auto-increment bit is set to 1, the address pointer is

incremented after every 16-bit word. This allows the system to program all the registers of the TMP126-Q1 in

a single burst write command. If the auto-increment is set to 1 for a read command, after each 16-bit word the

address pointer is incremented and the next word of data will be from the next Sub-Address.

The following sections denote example write and read operations with the TMP126-Q1.

8.5.2.3 Write Operations

Data is transmitted to the TMP126-Q1 by setting the R/W bit of the command word to 0. Data can be

continuously written to a single register by setting the auto-increment bit to 0 in the command register. Figure

8-11 shows an example of a repeated data write to a single register.

R/W

Peripheral controls SIO line

Controller controls SIO line

Auto Increment

Sub-Address

CS pulled low

D15 D14 D13 D12 D11 D10 D9

Data Word

Data to Register N

D15 D14 D13 D12 D11 D10 D9

Data Word

Data to Register N

D15 D14 D13 D12 D11 D10 D9

Data Word

Data to Register N

CS pulled high

CRC Data Block Length

CRC Enable

Don’t Care

CRC L4

Figure 8-11. Repeated Data Write to a Single Register

Figure 8-12 shows how setting the auto increment to logic 1 to can enable a write from multiple registers in a

single transaction.

TMP126-Q1

SNIS227C – MAY 2021 – REVISED JUNE 2022

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TMP126 Datasheet(PDF) 20 Page - Texas Instruments