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LM94 Datasheet(PDF) 23 Page - National Semiconductor (TI) |
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LM94 Datasheet(HTML) 23 Page - National Semiconductor (TI) |
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23 / 24 page ![]() 17.0 Electrical Notes (Continued) Note 10: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 11: TUE (Total Unadjusted Error) includes Offset, Gain and Linearity errors of the ADC. Note 12: Total Monitoring Cycle Time includes all temperature and voltage conversions. Note 13: Leakage current approximately doubles every 20 ˚C. Note 14: A total digital I/O current of 40 mA can cause 6 mV of offset in Vref. Note 15: Timing specifications are tested at the TTL logic levels, VIL = 0.4V for a falling edge and VIH = 2.4V for a rising edge. TRI-STATE output voltage is forced to 1.4V. www.national.com 23 |
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