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ADC14L040 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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ADC14L040 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
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4 / 23 page ![]() Pin Descriptions and Equivalent Circuits (Continued) Pin No. Symbol Equivalent Circuit Description 12-19 22-27 D0–D13 Digital data output pins that make up the 14-bit conversion result. D0 (pin 12) is the LSB, while D13 (pin 27) is the MSB of the output word. Output levels are TTL/CMOS compatible. Optimum loading is < 10pF. ANALOG POWER 5, 29 V A Positive analog supply pins. These pins should be connected to a quiet +3.3V source and bypassed to AGND with 0.1 µF capacitors located close to these power pins, and with a 10 µF capacitor. 4, 7, 28 AGND The ground return for the analog supply. DIGITAL POWER 6V D Positive digital supply pin. This pin should be connected to the same quiet +3.3V source as is V A and be bypassed to DGND with a 0.1 µF capacitor located close to the power pin and with a 10 µF capacitor. 9 DGND The ground return for the digital supply. 21 V DR Positive driver supply pin for the ADC14L040’s output drivers. This pin should be connected to a voltage source of +2.4V to V D and be bypassed to DR GND with a 0.1 µF capacitor. If the supply for this pin is different from the supply used for V A and V D, it should also be bypassed with a 10 µF capacitor. VDR should never exceed the voltage on V D. All 0.1 µF bypass capacitors should be located close to the supply pin. 20 DR GND The ground return for the digital supply for the ADC’s output drivers. These pins should be connected to the system digital ground, but not be connected in close proximity to the ADC’s DGND or AGND pins. See Section 5 (Layout and Grounding) for more details. www.national.com 4 |
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