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ADC3564 Datasheet(PDF) 21 Page - Texas Instruments |
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ADC3564 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 72 page  8.3.1.2 Analog Front End Design The ADC3564 is an unbuffered ADC and thus a passive kick-back filter is recommended to absorb the glitch from the sampling operation. Depending on if the input is driven by a balun or a differential amplifier with low output impedance, a termination network may be needed. Additionally a passive DC bias circuit is needed in AC-coupled applications which can be combined with the termination network. 8.3.1.2.1 Sampling Glitch Filter Design The front end sampling glitch filter is designed to optimize the SNR and HD3 performance of the ADC. The filter performance is dependent on input frequency and therefore the following filter designs are recommended for different input frequency ranges as shown in Figure 8-4 and Figure 8-5. 33 pF 33 10 33 10 82 nH 82 nH Termination Figure 8-4. Sampling glitch filter example for input frequencies from DC to 60 MHz 75 pF 33 10 33 10 91 nH 91 nH Termination 43 nH 33 pF 33 pF Figure 8-5. Sampling glitch filter example for input frequencies from 60 to 120 MHz www.ti.com ADC3564 SBAS887 – AUGUST 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: ADC3564 |
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