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L9788 Datasheet(PDF) 75 Page - STMicroelectronics |
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L9788 Datasheet(HTML) 75 Page - STMicroelectronics |
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75 / 264 page ![]() DS12308 Rev 4 75/264 L9788 Multi-voltage regulator supplies 263 6.5 VDD5 linear regulator with external MOSFET VDD5 voltage is generated by a linear controller with internal pre-driver and external MOS FET. Electrical characteristics are available in Table 34 and Table 35. VB_IN_OV fault can trigger the turn OFF of VDD5 regulator, as specified into reset matrix. This effect can be masked with bit VB_IN_OV_RST_EN in CONFIG_REG 12. VB_IN_UV fault triggers the turn OFF of VDD5 regulator, as specified into reset matrix. This effect can be masked with bit VDD5_OFF_SEL in CONFIG_REG 11. VDD5_OV fault has effects into the device specified into reset matrix. These effects can be masked with bit VDD5_OV_RST_EN in CONFIG_REG 12. Conditions: 5.5 V< VB_IN_SW ≤ 18 V, 5.5 V < VB_IN ≤ 18 V, Tj -40 to 175°C unless otherwise specified. Table 34. VDD5 linear controller pre-driver electrical characteristics Symbol Parameter Test condition Min Typ Max Unit Pin VVDD5 5 V regulated voltage including static load / line regulation Iload = 10 mA, 1 A 4.9 5 5.1 V VDD5_IN SRp-up_VDD5 Output voltage slew rate at power-up Cvdd5 = 10 µF; from VDD5*10% to VDD5*90% 2 - 25 V/ms VDD5_IN IVDD5 Controller stability over VDD5 output current range - 1 - - A VDD5_IN Vline_VDD5 Line regulation voltage 5.6 V < VPre < 18 V Iload 10mA, 1A Cvdd5 = 10 µF (1) -25 - 25 mV VDD5_IN Vload_VDD5 Load regulation voltage VPre 5.6 V, 18 V 10 mA < Iload < 1 A Cvdd5 = 10 µF (1) -25 - 25 mV VDD5_IN Vline_VDD5_tran Line transient regulation voltage Vpre from 5.6 V to 7 V by 1 µs Iload = 10 mA, 800 mA Cvdd5 =10µF Ext MOS STD20NF06L Guaranteed by design (1) - - 300 mV VDD5_IN Vload_VDD5_tran Load transient regulation voltage VPre = 6 V Iload from 10 mA to 800 mA by 1.5us Cvdd5=10µF Ext MOS STD20NF06L Guaranteed by design (1) - - 280 mV VDD5_IN Vdrift_Vdd5 Total VDD5 voltage aging drift - -0.8 - 0.8 % VDD5_IN |
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