L9788 datasheet(37/264 Pages) STMICROELECTRONICS

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DS12308 Rev 4

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L9788

Operation behavior

263

3.1.9

Power down from WAKE_UP_TIMER when PHOLD_EN=0

The chip is powered down if the MSC clears, by the MSC command WAKE_UP_EOT_RST,

WAKE_UP_EOT_DET (The counter counts up until the WAKE_UP_TIMER_SET is

reached) if no other power up source is active and PHOLD_EN = 0. The detection reset by

MSC command, WAKE_UP_EOT_RST=CONFIG_REG12[6], is active at level not at

change, so from when MSC writes them at 1 they keep on clearing the detections. If there is

further wake detection signal, the detection signal will be cleared, until the MSC writes 0 in

the bits.

3.1.10

Power down from PHOLD

The chip is powered down after the power hold timer programmed by MSC has expired or if

the PHOLD function is disabled by MSC. The PHOLD timer can be programmed as timeout

disabled so that the chip stays powered up.

3.1.11

Power up from CAN

The chip can be powered up from CAN according to what reported in the Wake Up (From

CAN) chapter. To allow the power up from CAN the pins VB_CAN, VB_STBY must be

supplied. In case the power up of the chip is not completed in a MRD_EN_TIMEOUT from

CAN valid pattern detection the Main Relay Driver is switched off and the chip goes in OFF

state

When U chip is already in on state (the logic is out of power on reset), the validation of a

valid CAN pattern only sets a flag, with no impact on power supply. This flag is named

WAKE_UP_CAN_DET (detection of a valid can pattern) and is cleared by VDD5/VDDIO

under voltage or by the MSC command WAKE_UP_CAN_RST. In this case if no other

power on source is active a power down sequence is started.

The Main Relay Driver is not switched on by WAKE_UP_CAN if the device is powered in

permanent battery.

3.1.12

Power down from WAKE_UP_CAN when PHOLD_EN=0

The chip is powered down if the MSC clears, by the MSC command WAKE_UP_CAN_RST,

WAKE_UP_CAN_DET (the detection of WAKE_UP_CAN high) if no other power up source

is active and PHOLD_EN = 0. The detection reset by MSC command,

WAKE_UP_CAN_RST=CONFIG_REG12[5], is active at level, so from when MSC writes

them at 1 they keep on clearing the detections. If there is further wake detection signal, the

detection signal will be cleared, until the MSC writes 0 in the bits.

3.1.13

Finish wake function

There is a Finish wake function (auto clear mechanism) of WK_IN_DET,

WAKE_UP_EOT_DET and WAKE_UP_CAN_DET. The purpose is to ensure the system

could power down from wake up state after the impulse timer timeout (typ. 1s).

If the software does not stop the impulse timer before time out, the WK_IN_DET,

WAKE_UP_EOT_DET and WAKE_UP_CAN_DET will be cleared as long as time out. If the

software stops the impulse timer (FIN_WAKE = 1) before time out, the WK_IN_DET,

WAKE_UP_EOT_DET and WAKE_UP_CAN_DET will not be cleared.

The impulse timer is not affected by watchdog(ERR_CNT>4) and EOT. The Finish wake

function is not disabled by RSTN pulled low externally and MSC_SW_RESET active. The

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