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P1012AP13 Datasheet(PDF) 14 Page - ON Semiconductor |
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P1012AP13 Datasheet(HTML) 14 Page - ON Semiconductor |
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14 / 25 page ![]() NCP1010, NCP1011, NCP1012, NCP1013, NCP1014 www.onsemi.com 14 Soft−Start The NCP101X features an internal 1.0 ms soft−start activated during the power on sequence (PON). As soon as VCC reaches VCCOFF, the peak current is gradually increased from nearly zero up to the maximum internal clamping level (e.g. 350 mA). This situation lasts 1.0 ms and further to that time period, the peak current limit is blocked to the maximum until the supply enters regulation. The soft−start is also activated during the over current burst (OCP) sequence. Every restart attempt is followed by a soft−start activation. Generally speaking, the soft−start will be activated when VCC ramps up either from zero (fresh power−on sequence) or 4.7 V, the latch−off voltage occurring during OCP. Figure 24 portrays the soft−start behavior. The time scales are purposely shifted to offer a better zoom portion. Figure 24. Soft−Start is activated during a startup sequence or an OCP condition. 0 V (Fresh PON) or 4.7 V (Overload) VCC 8.5 V Current Sense Max Ip 1.0 ms Non−Latching Shutdown In some cases, it might be desirable to shut off the part temporarily and authorize its restart once the default has disappeared. This option can easily be accomplished through a single NPN bipolar transistor wired between FB and ground. By pulling FB below the internal skip level (Vskip), the output pulses are disabled. As soon as FB is relaxed, the IC resumes its operation. Figure 25 depicts the application example. Figure 25. A non−latching shutdown where pulses are stopped as long as the NPN is biased. ON/OFF 27 3 45 18 Drain + CVcc |
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