INA821 datasheet(30/52 Pages) TI

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9 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification,

and TI does not warrant its accuracy or completeness. TI’s customers are responsible for

determining suitability of components for their purposes, as well as validating and testing their design

implementation to confirm system functionality.

9.1 Application Information

9.1.1 Output Common-Mode Pin

The output voltage of the INA851 is developed with respect to the voltage on the output common-mode pin,

VOCM. The starting point for most designs is to assign an output common-mode voltage for the INA851. For

ac-coupled signal paths, this voltage is often the default midsupply voltage, so as to retain the most available

output swing around the voltage centered at VOCM. For dc-coupled signal paths, set this voltage between a

minimum of VS+ – 2.5 V and maximum of VS– + 2.5 V. For precision ADC applications, this voltage is typically the

input common mode voltage of the ADC.

The voltage at the VOCM pin is internally buffered to bias the fully differential output amplifier, eliminating the

need for an additional external VOCM buffer. While the buffer input is high-ohmic, the VOCM pin also connects

through internal 500-kΩ resistors to VCLAMP+ and VCLAMP–, which sets the output common-mode voltage to

midsupply in the event that the pin is floating.

While the VOCM buffer has high small-signal bandwidth, be aware that large-signal steps with fast edges at the

VOCM pin cause delays in the output. For best tracking between the buffer input and output signals, use rise

times of 200 ns or greater for large steps.

9.1.2 Output-Stage Gain Selection and Noise-Gain Shaping

In the default unity-gain configuration, the INA851 fully differential amplifier output stage uses 5-kΩ feedback

resistors between the OUT+ and OUT– outputs and the inverting and noninverting inputs, respectively. However,

the INA851 also features internal 1.25-kΩ feedback resistors between those inputs and the G02+ and G02–

pins. By shorting the G02+ pin to the OUT+ pin, and the G02– pin to the OUT– pin, the amplifier is placed in an

attenuating gain of 0.2 V/V.

Additionally, access directly to the inverting and noninverting inputs of the fully differential amplifier is provided

through the FDA_IN– and FDA_IN+ pins, respectively. This option allows circuit designers to add external

feedback capacitors in parallel with the internal feedback resistors to implement noise filtering or noise-gain

shaping techniques. These pins can also be used to implement customized attenuating gains for the output

stage. Do not treat these pins as outputs, nor use the pins to source or sink current.

Note

These pins are internally disconnected on preliminary samples of the INA851; these pins will be

connected to the aforementioned internal nodes in the final device release.

INA851

SBOS999A – MARCH 2022 – REVISED OCTOBER 2022

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INA821 Datasheet(PDF) 30 Page - Texas Instruments