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AD74115BCPZ Datasheet(PDF) 79 Page - Analog Devices

Part # AD74115BCPZ
Description  Single-Channel, Software Configurable Input and Output
PDF  103 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD74115BCPZ Datasheet(HTML) 79 Page - Analog Devices

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Data Sheet
AD74115
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Table 42. Bit Descriptions for DIN_CONFIG2 (Continued)
Bits
Bit Name
Description
Reset
Access
10
DIN_UNBUF_EN
Digital Input Unbuffered Enable.
0x0
R/W
9
DIN_SC_DET_EN
Digital Input Short Circuit Detect Enable (when configured for IEC 61131 Type 3D diagnostics, as
described in the Digital Input Logic section).
0x0
R/W
8
DIN_OC_DET_EN
Digital Input Open Circuit Detect Enable (when configured for IEC 61131 Type 3D diagnostics, as
described in the Digital Input Logic section).
0x0
R/W
7
DIN_THRESH_MODE
This Bitfield Sets the Reference to the DIN Threshold DAC.
0x0
R/W
0: the threshold scales with AVDD. The threshold range is from −0.96 × AVDD to AVDD.
1: fixed threshold. Threshold is from −19 V to +30 V.
[6:0]
COMP_THRESH
Comparator Threshold. DIN comparator threshold.
0x0
R/W
Output Configuration Register
Address: 0x06, Reset: 0x0000, Name: OUTPUT_CONFIG
This register configures the output settings of the channel.
Table 43. Bit Descriptions for OUTPUT_CONFIG
Bits
Bit Name
Description
Reset
Access
[15:8]
RESERVED
Reserved.
0x0
R
7
VOUT_RANGE
Voltage Output Range.
0x0
R/W
0: 0 to 12 V.
1: −12 V to +12 V.
[6:5]
SLEW_EN
Selects DAC Slew Option.
0x0
R/W
00: slewing disabled. Slewing stops immediately when disabled, there are no further updates to the DAC code.
01: enable linear slew on the DAC output.
Others: reserved.
[4:3]
SLEW_LIN_STEP
Step Size for Digital Linear Slew.
0x0
R/W
00: voltage step size of 0.8% of full-scale DAC voltage.
01: voltage step size of 1.5% of full-scale DAC voltage.
10: voltage step size of 6.1% of full-scale DAC voltage.
11: voltage step size of 22.2% of full-scale DAC voltage.
[2:1]
SLEW_LIN_RATE
Update Rate for Digital Linear Slew.
0x0
R/W
00: update at a rate of 4 kHz.
01: update at a rate of 64 kHz.
10: update at a rate of 150 kHz.
11: update at a rate of 240 kHz.
0
I_LIMIT
Sets the Sink and Source Current Limits in Output Modes. These are typical current limits.
0x0
R/W
0: Current-Limit 0. VOUT: 32 mA source or sink. IOUT: 4 mA sink.



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