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LMV112 Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # LMV112
Description  40 MHz Dual Clock Buffer
PDF  14 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMV112 Datasheet(HTML) 3 Page - National Semiconductor (TI)

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2.7V Electrical Characteristics (Continued)
Unless otherwise specified, all limits are guaranteed for T
J = 25˚C, VDD = 2.7V, VSS = 0V, VCM = 1V, Enable1,2 =VDD,CL =20
pF, R
L =30k
Ω,C
COUPLING = 1 nF. Boldface limits apply at temperature range extremes of operating condition. See (Note 4)
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
V
O
Output Swing Positive
V
IN =VDD
2.65
2.63
2.69
V
Output Swing Negative
V
IN =VSS
10
50
65
mV
I
SC
Output Short-Circuit Current
(Note 9)
Sourcing
−18
−13
−27
mA
Sinking
20
16
30
V
en_hmin
Enable High Active Minimum
Voltage
1.2
V
V
en_lmax
Enable Low Inactive Maximum
Voltage
0.6
5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for T
J = 25˚C, VDD = 5V, VSS = 0V, VCM = 1V, Enable1,2 =VDD,CL =20
pF, R
L =30k
Ω,C
COUPLING = 1 nF. Boldface limits apply at temperature range extremes of operating condition. See (Note 4)
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
Frequency Domain Response
SSBW
Small Signal Bandwidth
V
IN = 0.63 VPP;−3dB
42
MHz
FPBW
Full Power Bandwidth
V
IN = 1.6 VPP;−3dB
31
MHz
GFN
Gain Flatness < 0.1 dB
f > 100 kHz
4.9
MHz
Distortion and Noise Performance
e
n
Input-Referred Voltage Noise
f = 1 MHz
27
nV/
I
SOLATION
Output to Input
f = 1 MHz
90
dB
CT
Crosstalk Rejection
f = 26 MHz, P
IN = 0 dBm
61
dB
Time Domain Response
t
r
Rise Time
0.1 V
PP Step (10-90%),f=1MHz
7
ns
t
f
Fall Time
6ns
t
s
Settling Time to 0.1%
1 V
PP Step,f=1MHz
80
ns
OS
Overshoot
0.1V
PP Step,f=1MHz
20
%
SR
Slew Rate (Note 7)
V
IN = 1.6 VPP,f=26MHz
120
V/µs
Static DC Performance
I
S
Supply Current
Enable
1,2 =VDD ; No Load
2.5
3.5
3.8
mA
Enable
1,2 =VSS ; No Load
62
80
89
µA
PSRR
Power Supply Rejection Ratio
DC (3.0V to 5.0V)
58
57
68
dB
A
CL
Small Signal Voltage Gain
V
OUT = 0.1 VPP
0.99
0.97
1.00
1.01
1.03
V/V
V
OS
Output Offset Voltage
1.3
16
17
mV
TC V
OS
Temperature Coefficient Output
Offset Voltage (Note 8)
3
µV/˚C
R
OUT
Output Resistance
f = 100 kHz
0.5
Ω
f = 26 MHz
118
www.national.com
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