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LMV112 Datasheet(PDF) 13 Page - National Semiconductor (TI) |
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LMV112 Datasheet(HTML) 13 Page - National Semiconductor (TI) |
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13 / 14 page ![]() Application Section (Continued) LAYOUT DESIGN RECOMMENDATION Careful consideration for circuitry design and PCB layout will eliminate problems and will optimize the performance of the LMV112. It is best to have the same ground plane on the PCB for all power supply lines. This gives a low impedance return path for all decoupling and other ground connections. To ensure a clean supply voltage it is best to place decou- pling capacitors close to the LMV112, between V CC and ground. The output of the VCO must be correctly terminated with proper load impedance. Another important issue is the value of the components, which also determines the sensitivity to disturbances. Resis- tor value’s should be but avoid using values that cause a significant increase in power consumption while loading in- puts or outputs to heavily. www.national.com 13 |
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