MCP6486 datasheet(16/46 Pages) MICROCHIP

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MCP6486/6R/6U/7/9

DS20006679A-page 16

 2022 Microchip Technology Inc. and its subsidiaries

4.1.4

NORMAL OPERATION

The input stage of the MCP6486/6R/6U/7/9 op amp

uses two differential input stages in parallel. One

operates at a low Common mode input voltage (VCM),

while the other operates at a high VCM. With this

topology, the device operates with a VCM up to 300 mV

above VDD and 300 mV below VSS. The input offset

voltage is measured at VCM =VSS -0.3V and

VDD + 0.3V to ensure proper operation.

The transition between the input stages occurs when

VCM is near VDD -0.9V (see Figures 2-3 and 2-4). For

the best distortion performance and gain linearity, with

noninverting gains, avoid this region of operation.

4.2

Rail-to-Rail Output

The output voltage range of the MCP6486/6R/6U/7/9

op amp is 0.003V (typical) and 5.496V (typical) when

RL =10k is connected to VDD/2 and VDD =5.5V.

Refer to Figures 2-16 and 2-17 for more information.

4.3

Start-up

The MCP6486/6R/6U/7/9 family of parts quickly

controls the output when power (VDD) is initially applied

to the device (start-up). Bypass capacitors are

removed during the start-up testing to minimize the

inrush currents (see Figure 4-3). When the op amp is

controlled and is off, the output impedance is high and

VOUT is the input sine wave; this is used as the start-up

time.

FIGURE 4-3:

Start-Up Test Circuit.

Figure 4-4 shows the input voltage (blue line) for the

MCP6487 and the output voltage (red line). When

power is first applied to the MCP6487, the output is

turned off (Point A) and is driven by the load. After

2.3 µs (typical), the output is turned on (Point B) and

VOUT follows the input sine wave.

FIGURE 4-4:

Start-Up Test Waveforms.

4.4

Capacitive Loads

Driving large capacitive loads can cause stability

problems for voltage feedback op amps. As the load

capacitance increases, the feedback loop’s phase

margin decreases, and the closed-loop bandwidth is

reduced. This produces gain peaking in the frequency

response, with overshoot and ringing in the step

response. While a unity-gain buffer (G = +1 V/V) is the

most sensitive to the capacitive loads, all gains show

the same general behavior.

When driving large capacitive loads with the

MCP6486/6R/6U/7/9 op amp, a small series resistor at

the output (RISO in Figure 4-5) improves the feedback

loop’s phase margin (stability) by making the output

load resistive at higher frequencies. The bandwidth will

be generally lower than the bandwidth with no

capacitance load.

FIGURE 4-5:

Output Resistor, RISO

Stabilizes Large Capacitive Loads.

4.5

Supply Bypass

The MCP6486/6R/6U/7/9 op amp’s power supply pin

(VDD for single-supply) should have a local bypass

capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good

high-frequency performance. It can use a bulk

capacitor (i.e., 1 µF or larger) within 100 mm to provide

large, slow currents. This bulk capacitor can be shared

with other analog parts.

VDD

VSS

VL = 1V

VDD

5.5V

VOUT

Time (1 μs/div)

DD = 5.5V

No Bypass Capacitors

IN = 100mVPP

OUT

start

VIN

RISO

VOUT

–

MCP648x

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