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SN65CML100D Datasheet(PDF) 12 Page - Texas Instruments |
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SN65CML100D Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 15 page ![]() SN65CML100 SLLS547 – NOVEMBER 2002 www.ti.com 12 APPLICATION INFORMATION For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. When VBB is used, decouple VBB via a 0.01-µF capacitor and limit the current sourcing or sinking to 0.4 mA. When not used, VBB should be left open. TYPICAL APPLICATION CIRCUITS (ECL, PECL, LVDS, ETC.) 3.3 V or 5 V SN65CML100 3.3 V 50 Ω 50 Ω A B 50 Ω 50 Ω VTT VTT = VCC –2 V ECL Figure 24. Low-Voltage Positive Emitter-Coupled Logic (LVPECL) 3.3 V SN65CML100 3.3 V 50 Ω 50 Ω A B CML VTT Figure 25. Current–Mode Logic (CML) 3.3 V SN65CML100 3.3 V 50 Ω A B 50 Ω ECL VBB VTT VTT = VCC –2 V Figure 26. Single-Ended (LVPECL) 3.3 V or 5 V SN65CML100 3.3 V 50 Ω 50 Ω A B 100 Ω LVDS Figure 27. Low-Voltage Differential Signaling (LVDS) |
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