ADN2860

Rev. A | Page 7 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

PIN 1

INDICATOR

NC = NO CONNECT

1

RESET

2

WP

3

SCL

4

SDA

5

DGND

6

15 A0

16

17 TEST3 (NC)

18 TEST2 (NC)

14 W0

13 B0

TOP VIEW

(Not to Scale)

AD2860

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

RESET

Resets the scratchpad register with current contents of the EEMEM register. Factory defaults to midscale before

any programming.

2

WP

Write Protect. When active low, WP prevents any changes to the present register contents, except that RESET

and Commands 1 and 8 still refresh the RDAC register from EEMEM.

3

SCL

Serial Input Register Clock. Shifts in one bit at a time upon the positive clock edges.

4

SDA

Serial Data Input. Shifts in one bit at a time upon the positive edges. The MSB is loaded first.

5

DGND

Ground. Logic ground reference.

6

Negative Supply. Connect to 0 V for single-supply applications.

7

A2

A Terminal of RDAC2.

8

W2

Wiper Terminal of RDAC2.

9

B2

B Terminal of RDAC2.

10

A1

A Terminal of RDAC1.

11

W1

Wiper Terminal of RDAC1.

12

B1

B Terminal of RDAC1.

13

B0

B Terminal of RDAC0.

14

W0

Wiper Terminal of RDAC0.

15

A0

A Terminal of RDAC0.

16

Positive Power Supply.

17

TEST3

Test Pin 3. Do not connect.

18

TEST2

Test Pin 2. Do not connect.

19

TEST1

Test Pin 1. Do not connect.

20

TEST0

Test Pin 0. Do not connect.

21

A1_EE

22

A0_EE

23

AD1

24

AD0