4 Channel 500MSPS DDS with 10-bit DACs

Preliminary Technical Data

AD9959

Rev. PrB

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FEATURES

Four synchronized DDS channels @500 MSPS

Independent frequency / phase / amplitude

control between all channels

Matched latencies for Freq, Phase, and Amplitude changes

Excellent channel to channel isolation

Frequency sweeping capability

Up to 16 levels of modulation (pin selectable)

Individually programmable DAC full scale currents

Four integrated 10-bit D/A converters(DACs)

32-bit frequency tuning resolution

14-bit phase offset resolution

10-bit output amplitude scaling resolution

Serial I/O Port(SPI) with enhanced data throughput

Software/Hardware controlled power-down

Dual supply operation (1.8 V DDS core / 3.3 V serial I/O)

Built-in synchronization for multiple devices

Selectable REF_CLK multipier(PLL) 4x to 20x (bypassable)

Selectable REF_CLK crystal operation

56 pin LFCSP package

APPLICATIONS

Agile L.O. frequency synthesis

Phased array radar / sonar

Instrumentation

Synchronized clocking

RF source for AOTF

FUNCTIONAL BLOCK DIAGRAM

14

BUFFER / XTAL

OSCILLATOR

CLK_MODE_SEL

M

U

X

REF CLOCK

MULTIPLIER

(PLL) 4x to 20x

CHANNEL

REGISTERS

PWR_DWN_CTL

FTW

PHASE

OFFSET

IOUT

DAC

÷4

OSC / REF_CLK

MASTER_RESET

CS

SCLK

SDIO_0

SDIO_1

SDIO_2

SDIO_3

SCALABLE

DAC REF

CURRENT

DAC_RSET

Σ

Σ

COS(X)

DIGITAL

MULTIPLIER

I/O

Port

Buffer

×

10

FREQUENCY

ACCUMULATOR

Σ

10

10

DAC

Σ

Σ

COS(X)

×

10

Σ

10

DAC

Σ

Σ

COS(X)

×

10

Σ

10

DAC

Σ

Σ

COS(X)

×

10

Σ

10

32

8

RAMP

RATE

DFTW

32

Timing & Control Logic

SYNC_CLK

SYNC_IN

SYNC_OUT

PROFILE

REGISTERS

P

S

0

P

S

3

P

S

2

P

S

1

SYSTEM

CLK

I/O_UPDATE

AVDD

DVDD

DVDD_IO

1.8V

1.8V

3.3V

15

32

32

32

32

32

32

32

32

15

15

15

OSC / REF_CLK

DDS CORE

DDS CORE

DDS CORE

DDS CORE

CONTROL

REGISTERS

IOUT

IOUT

IOUT

IOUT

IOUT

IOUT

IOUT

FREQUENCY

ACCUMULATOR

FREQUENCY

ACCUMULATOR

FREQUENCY

ACCUMULATOR

Figure 1 AD9959 Block Diagram