MAX1513 datasheet(21/28 Pages) MAXIM

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TFT-LCD Power-Supply Controllers

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In the circuits of Figures 1 and 2, the maximum total

voltage ripple is 1% (peak-to-peak) of the 15V output,

which corresponds to 150mV peak-to-peak ripple. A

conservative way to calculate the maximum ESR and

minimum capacitance is to assume the ESR ripple and

the capacitive ripple each should not exceed 50% of

the total ripple budget.

where VRIPPLE(MAX) is the total peak-to-peak output rip-

ple. Since the peak inductor current calculated in the

Inductor Selection section is 2.6A, the maximum ESR of

the output capacitor should be less than 29m

Ω. On the

other hand, only 3.1µF capacitance is needed to meet

the capacitive ripple requirement based on the calcula-

tion. A 10µF AQU-series POSCAP with maximum ESR

of 20m

Ω is selected for the typical operating circuits in

Figures 1 and 2, which meets both the voltage-ripple

and minimum capacitance requirements.

The typical load on the step-up regulator for source-

driver applications is a large pulsed load, with a peak

current of approximately 1A and a pulse width of

approximately 2µs. The shape of the pulse is close to

triangular, so it is equivalent to a square pulse with 1A

height and 1µs pulse width. The total voltage dip during

the pulsed load transient also has two components: the

ohmic dip due to the output capacitor’s ESR and the

capacitive dip caused by discharging the output

capacitance:

where IPULSE is the height of the pulse load and tPULSE

is the pulse width. Higher capacitance and lower ESR

result in less voltage dip. Again, assume the ESR dip

and the capacitive dip each should not exceed 50% of

the total maximum allowed output-voltage dip caused

by a load pulse (VDIP(MAX)).

For the typical load pulse described above, assuming the

voltage dip must be limited to 200mV, the minimum out-

put capacitor is 10µF, and the maximum ESR is 100m

Ω.

The voltage rating and temperature characteristics of

the output capacitor must also be considered.

Input-Capacitor Selection

The input capacitor (CIN) reduces the current peaks

drawn from the input supply and reduces noise injec-

tion into the device. A 22µF ceramic capacitor is used

in the typical operating circuit (Figure 1) because of the

high source impedance seen in typical lab setups.

Actual applications usually have much lower source

impedance since the step-up regulator often runs

directly from the output of another regulated supply.

Typically, CIN can be reduced below the values used in

the typical operating circuit. Ensure a low noise supply

at IN by using adequate CIN. Alternately, greater volt-

age variation can be tolerated on CIN if IN is decoupled

from CIN using an RC lowpass filter (see R11 and C10

in Figure 1).

Rectifier Diode

The MAX1513/MAX1514s’ high switching frequency

demands a high-speed rectifier. Schottky diodes are

recommended for most applications because of their

fast recovery time and low forward voltage. In general,

use a Schottky diode with a current rating exceeding

the peak inductor current calculated in the Inductor

Selection section.

Output-Voltage Selection

The output voltage of the main step-up regulator is

adjustable by connecting a resistive voltage-divider

from the output (VMAIN) to the analog ground plane

with the center tap connected to FB (see Figure 1).

Select R2 in the 10k

Ω to 50kΩ range. Calculate R1 with

the following equations:

where VFB, the step-up regulator’s feedback set point,

is 1.25V. Connect the divider close to the IC.

Output-Capacitor Stability Requirement

The step-up regulator controller of the MAX1513/

MAX1514 uses a peak current-mode control method.

The loop stability of a current-mode step-up regulator

can be analyzed using a small-signal model. In contin-

uous-conduction mode, the loop-gain transfer function

consists of a DC loop gain, a dominant pole, a right-

half-plane (RHP) zero and an ESR zero.

MAIN

=×

⎛

⎝⎜

⎞

⎠⎟

ESR MAX

DIP MAX

PULSE

OUT MIN

PULSE

DIP MAX

()

≤

≥

××

DIP

DIP ESR

DIP C

DIP ESR

PULSE

ESR

DIP C

PULSE

OUT

()

( )

()

=×

≈

ESR MAX

RIPPLE MAX

PEAK

OUT MIN

MAIN

RIPPLE MAX

MAIN

OSC

()

≤

≥

⎛

⎝

⎜

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