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UBA20271 Datasheet(PDF) 16 Page - NXP Semiconductors |
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UBA20271 Datasheet(HTML) 16 Page - NXP Semiconductors |
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16 / 33 page ![]() UBA20271_UBA20272 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2.1 — 12 October 2011 16 of 33 NXP Semiconductors UBA20271/2 350 V and 600 V Power ICs for dimmable compact fluorescent lamps 7.4.5 Power-down mode Power-down mode starts when: • a continuous overcurrent exceeds the maximum overcurrent time-out tfault(oc).Or over a longer period when an overcurrent occurs in more than half the number of cycles Vth(CP)min is reached. • during the boost or the burn state fbridge(max) is reached due to capacitive mode detection • two consecutive failed lamp ignition attempts occur In power-down mode, the oscillator is stopped and the HS transistor is non-conductive while the LS transistor is conductive. The VDD supply is internally clamped. The circuit is released from power-down mode by lowering the low voltage supply lower than VDD(rst) (mains switch reset). An option exists to set the IC in power-down mode via external logic. The external power-down option is only available when the IC is in the boost or burn state. To enable the external power-down option, the CP pin is used. When pin CP, is connected via a 10 k resistor to either the PGND or SGND the voltage on pin CP is pulled down lower than Vth(pd)CP. This results in the IC entering power-down mode. Remark: Do not connect the CP pin directly to the SGND or PGND pin. Connect the SGND or PGND pin via a series 10 k resistor otherwise excessive currents flow during reset and start-up. Excessive current prevent the IC from starting up. 7.4.6 OverTemperature Protection (OTP) The OTP circuit is designed to prevent the IC from overheating in hazardous environments. The circuit is triggered when the IC temperature exceeds the maximum temperature value Tj(otp). OTP changes the lamp current to the level that corresponds to Votp(CSI) level. This condition remains until the IC temperature reduces by 20 C (=Tj(otp)hys) and returns to the DCI controlled level. |
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