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P9222-R Datasheet(PDF) 52 Page - Renesas Technology Corp |
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P9222-R Datasheet(HTML) 52 Page - Renesas Technology Corp |
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52 / 58 page ![]() P9222-R/RN Datasheet © 2019-2022 Renesas Electronics Corporation 52 May 5, 2022 Table 41. VRECT Knee Register (0x92, 8-bit) Address and Bit Register Field Name R/W Default Value Function and Description 0x92 [7:0] PwrKnee R/W 0x0F Threshold in units of 0.1W output power at which minimal window is applied. Table 42. VRECT Correction Factor Register (0x93, 8-bit) Address and Bit Register Field Name R/W Default Value Function and Description 0x93 [7:0] VrCorrFactor R/W 0x19 Coefficient used in the Vrect Target calculation algorithm. Table 43. VRECT Maximum Correction Register (0x94, 16-bit) Address and Bit Register Field Name R/W Default Value Function and Description 0x94 [15:0] VrMaxCorr R/W 0xEA Maximum width of the window in ADC codes. Table 44. VRECT Minimum Correction Register (0x96, 16-bit) Address and Bit Register Field Name R/W Default Value Function and Description 0x96 [15:0] VrMinCorr R/W 0x0D Minimum width of the window in ADC codes. |
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