P9222-R datasheet(14/58 Pages) RENESAS

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P9222-R/RN Datasheet

May 5, 2022

Symbol

Description

Conditions

Minimum

Typical

Maximum

Unit

tLOW

Clock Low Period

1.3

µs

tHIGH

Clock High Period

0.6

µs

tSU_STA

Set-up Time for

Repeated START

Condition

0.6

µs

tBUF

Bus Free Time Between

STOP and START

Condition

1.3

µs

Capacitive Load for

each Bus Line

150

SCL, SDA Input

Capacitance

VIL_I2C

Input Low Level

0.7

VIH_I2C

Input High Level

1.4

ILKG_I2C

Input Leakage Current

V = 0V and 5V

-1

µA

VOL_I2C

Output Logic Low

IOL= 8mA

0.36

[a] VRECT can be as high as 18V but the device “Electrical Characteristics” table limits are not guaranteed under this condition.

[b] Full power transfer might not occur at the minimum VRECT operating specification.

[c] Not 100% production tested. Guaranteed by design.

[d] For internal biasing only; can be used for weak pull-ups or EEPROM power (not to exceed 10mA total).

[e] Any open-drain GPIO (OD2) that is connected to the ADC should remain below 2.1V to prevent saturation of the ADC.

[f] The internal temperature is monitored, and the P9222-R/RN is temporarily deactivated if the temperature exceeds the thermal shutdown limit of

140°C typically. The P9222-R/RN is reactivated when the temperature falls below the thermal shutdown hysteresis (20°C typically).

[g] The pull-up voltage level can be connected to LDO5P0 (5V) or LDO1P8 (1.8V).

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