P9222-R datasheet(25/58 Pages) RENESAS

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P9222-R/RN Datasheet

May 5, 2022

6.2 Reading Data Sent from the P9235-RB to the P9222-R/RN

The P9222-R/RN can receive 7 bytes of information at a time. When the P9222-R/RN receives the data from the P9235-RB, it will generate an

interrupt to the external MCU on the receiver by pulling down the interrupt pin, INT. Because interrupts can be generated for multiple reasons,

the MCU can respond to the data received interrupt and read the data received flag in bit 5 of System Interrupt register 0x36 and bit 5 of System

Status register 0x34, respectively, to confirm that the interrupt is generated because of new incoming data. After confirming that new data is

available to read, the external MCU can read incoming header register (0x57) and user data registers (0x58 to 0x5F).

Table 7.

Registers Used for Reading User Data from the P9235-RB

Command Register

0x4E

System Status Register

0x34

System Interrupt Register

0x36

Interrupt Enable Register

0x38

Interrupt Clear Register

0x3A

Clear Interrupt Events

0x4E (bit 5 set to 1)

Header Register

0x57

User Incoming Data Registers

0x58 to 0x5F (7 bytes)

Note: TX Data Received Interrupt Enable Register 0x38 bit 5 is disabled by default.

After reading the data, the external MCU on the receiver should clear the interrupt by writing 1 to bit 5 in Interrupt Clear Register 0x3A, which

clears the data received interrupt and data received flag. Afterwards, bit 5 in the Command Register (0x4E) should be set to 1b to instruct the

processor to clear the interrupt events. If the interrupt event is not cleared, the P9222-R/RN will reject new incoming data because old data was

not read by the MCU on the receiver. The user can implement a higher-level handshaking protocol between the external MCU on the transmitter

and the receiver to avoid data corruption.

P9222-R Datasheet(PDF) 25 Page - Renesas Technology Corp