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RAA210040 Datasheet(PDF) 22 Page - Renesas Technology Corp |
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RAA210040 Datasheet(HTML) 22 Page - Renesas Technology Corp |
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22 / 25 page ![]() R16DS0137EU0100 Rev.1.0 Page 22 Apr 13, 2021 RAA210040 Datasheet 8.2 Thermal Vias Place a grid of 1.0mm to 1.2mm pitched thermal vias, which drops down and connects to buried copper planes under the thermal land. The vias should be about 0.3mm to 0.33mm in diameter, with the barrel plated to about 2.0 ounce copper. Although adding more vias (by decreasing pitch) improves thermal performance, it also diminishes results as more vias are added. Use only as many vias as needed for the thermal land size and as your board design rules allow. 8.3 Stencil Pattern Design Reflowed solder joints on the perimeter I/O lands should have about a 50µm to 75µm (2 mil to 3 mil) standoff height. The solder paste stencil design is the first step in developing optimized, reliable solder joins. The stencil aperture size to land size ratio should typically be 1:1. Reduce the aperture width slightly to help prevent solder bridging between adjacent I/O lands. Renesas recommends using an array of smaller apertures instead of one large aperture to reduce the solder paste volume on larger thermal lands. The stencil printing area should cover 50% to 80% of the PCB layout pattern. Consider the symmetry of the whole stencil pattern when designing the pads. Renesas recommends using a laser-cut, stainless-steel stencil with electropolished trapezoidal walls. Electropolishing smooths the aperture walls, resulting in reduced surface friction and better paste release, which reduces voids. Using a Trapezoidal Section Aperture (TSA) also promotes paste release and forms a brick-like paste deposit, which assists in firm component placement. 8.4 Reflow Parameters Renesas recommends using a No Clean Type 3 solder paste, per ANSI/J-STD-005 because of the low mount height of the DFN package. Nitrogen purge is also recommended during reflow. A system board reflow profile depends on the thermal mass of the entire populated board, therefore, it is not practical to define a specific soldering profile just for the DFN package. The profile given in TB493 is provided as a guideline to customize for varying manufacturing practices and applications. |
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