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DSPIC30F Datasheet(PDF) 242 Page - Microchip Technology |
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DSPIC30F Datasheet(HTML) 242 Page - Microchip Technology |
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242 / 248 page  dsPIC30F DS70083G-page 240 Preliminary 2004 Microchip Technology Inc. MPLAB Integrated Development Environment Software .. 177 MPLINK Object Linker/MPLIB Object Librarian ................ 178 Multiplier 16-bit Integer and Fractional Modes Example ............ 30 N NVM Register Map............................................................... 67 O OC/PWM Module Timing Characteristics.......................... 204 Operating Current (I DD)..................................................... 185 Operating Frequency vs Voltage dsPIC30FXXXX-20 (Extended)................................. 184 Oscillator Configurations ........................................................... 156 Fail-Safe Clock Monitor..................................... 158 Fast RC (FRC) .................................................. 157 Initial Clock Source Selection ........................... 156 Low Power RC (LPRC) ..................................... 158 LP Oscillator Control ......................................... 157 Phase Locked Loop (PLL) ................................ 157 Start-up Timer (OST) ........................................ 157 Operating Modes (Table) .......................................... 154 System Overview ...................................................... 153 Oscillator Selection ........................................................... 153 Oscillator Start-up Timer Timing Characteristics .............................................. 199 Timing Requirements ................................................ 200 Output Compare Interrupts ............................................... 101 Output Compare Module..................................................... 99 Register Map............................................................. 102 Timing Characteristics .............................................. 203 Timing Requirements ................................................ 203 Output Compare Operation During CPU Idle Mode.......... 101 Output Compare Sleep Mode Operation........................... 101 P Packaging Information ...................................................... 223 Marking ..................................................................... 223 Peripheral Module Disable (PMD) Registers .................... 167 PICkit 1 Flash Starter Kit................................................... 181 PICSTART Plus Development Programmer ..................... 179 Pinout Descriptions ............................................................. 19 PLL Clock Timing Specifications....................................... 197 POR. See Power-on Reset. Port Write/Read Example.................................................... 76 PORTA Register Map ......................................................... 77 PORTB Register Map ......................................................... 77 PORTC Register Map ......................................................... 77 PORTD Register Map ......................................................... 77 PORTF Register Map.......................................................... 78 PORTG Register Map ......................................................... 78 Power Saving Modes ........................................................ 165 Idle ............................................................................ 166 Sleep ......................................................................... 165 Sleep and Idle ........................................................... 153 Power-Down Current (I PD) ................................................ 189 Power-up Timer Timing Characteristics .............................................. 199 Timing Requirements ................................................ 200 PRO MATE II Universal Device Programmer ................... 179 Program Address Space ..................................................... 35 Alignment and Data Access Using Table Instructions.......................................................... 36 Construction ................................................................ 35 Data Access from, Address Generation ..................... 35 Data Space Window into Operation............................ 38 Data Table Access (LS Word) .................................... 36 Data Table Access (MS Byte)..................................... 37 Memory Map............................................................... 39 Table Instructions TBLRDH ............................................................. 36 TBLRDL.............................................................. 36 TBLWTH............................................................. 36 TBLWTL ............................................................. 36 Visibility from Data Space........................................... 37 Program and EEPROM Characteristics............................ 194 Program Counter ................................................................ 22 Programmable .................................................................. 153 Programmer’s Model .......................................................... 22 Diagram ...................................................................... 23 Programming Operations.................................................... 65 Algorithm for Program Flash....................................... 65 Erasing a Row of Program Memory............................ 65 Initiating the Programming Sequence......................... 66 Loading Write Latches ................................................ 66 Protection Against Accidental Writes to OSCCON ........... 159 R Reset ........................................................................ 153, 159 BOR, Programmable ................................................ 162 Brown-out Reset (BOR)............................................ 153 Oscillator Start-up Timer (OST) ................................ 153 POR Operating without FSCM and PWRT................ 162 With Long Crystal Start-up Time ...................... 162 POR (Power-on Reset)............................................. 160 Power-on Reset (POR)............................................. 153 Power-up Timer (PWRT) .......................................... 153 Reset Sequence ................................................................. 57 Reset Sources ............................................................ 57 Reset Sources Brown-out Reset (BOR).............................................. 57 Illegal Instruction Trap ................................................ 57 Trap Lockout............................................................... 57 Uninitialized W Register Trap ..................................... 57 Watchdog Time-out .................................................... 57 Reset Timing Characteristics............................................ 199 Reset Timing Requirements ............................................. 200 RTSP Operation ................................................................. 64 Run-Time Self-Programming (RTSP) ................................. 63 S Serial Peripheral Interface. See SPI. Simple Capture Event Mode............................................... 96 Buffer Operation ......................................................... 96 Hall Sensor Mode ....................................................... 96 Prescaler .................................................................... 96 Timer2 and Timer3 Selection Mode............................ 96 Simple OC/PWM Mode Timing Requirements ................. 204 Simple Output Compare Match Mode .............................. 100 Simple PWM Mode ........................................................... 100 Input Pin Fault Protection ......................................... 100 Period ....................................................................... 101 Software Simulator (MPLAB SIM) .................................... 178 Software Simulator (MPLAB SIM30) ................................ 178 Software Stack Pointer, Frame Pointer .............................. 22 CALL Stack Frame ..................................................... 41 SPI .................................................................................... 103 SPI Module ....................................................................... 103 Framed SPI Support ................................................. 103 |
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