DSPIC30F datasheet(240/248 Pages) MICROCHIP

240 / 248 page

dsPIC30F

DS70083G-page 238

Preliminary

 2004 Microchip Technology Inc.

Sample Memory Map .................................................. 42

Software Stack ............................................................ 41

Spaces ........................................................................ 39

Width ........................................................................... 40

Data Converter Interface (DCI) Module ............................ 135

Data EEPROM Memory ...................................................... 69

Erasing ........................................................................ 70

Erasing, Block ............................................................. 70

Erasing, Word ............................................................. 70

Protection Against Spurious Write .............................. 73

Reading....................................................................... 69

Write Verify ................................................................. 73

Writing ......................................................................... 71

Writing, Block .............................................................. 72

Writing, Word .............................................................. 71

Data Space Organization .................................................... 47

DC Characteristics ............................................................ 184

BOR .......................................................................... 194

Brown-out Reset ....................................................... 193

I/O Pin Input Specifications ....................................... 191

I/O Pin Output Specifications .................................... 192

Idle Current (I

IDLE) .................................................... 187

Low-Voltage Detect................................................... 192

LVDL ......................................................................... 193

Operating Current (I

DD)............................................. 185

Power-Down Current (I

PD) ........................................ 189

Program and EEPROM............................................. 194

Temperature and Voltage Specifications .................. 184

DCI Module

Bit Clock Generator................................................... 139

Buffer Alignment with Data Frames .......................... 140

Buffer Control ............................................................ 135

Buffer Data Alignment ............................................... 135

Buffer Length Control ................................................ 140

COFS Pin .................................................................. 135

CSCK Pin .................................................................. 135

CSDI Pin ................................................................... 135

CSDO Mode Bit ........................................................ 141

CSDO Pin ................................................................. 135

Data Justification Control Bit ..................................... 139

Device Frequencies for Common Codec CSCK Frequen-

cies (Table) ....................................................... 139

Digital Loopback Mode ............................................. 141

Enable ....................................................................... 137

Frame Sync Generator ............................................. 137

Frame Sync Mode Control Bits ................................. 137

I/O Pins ..................................................................... 135

Interrupts ................................................................... 141

Introduction ............................................................... 135

Master Frame Sync Operation .................................. 137

Operation .................................................................. 137

Operation During CPU Idle Mode ............................. 142

Operation During CPU Sleep Mode .......................... 142

Receive Slot Enable Bits........................................... 140

Receive Status Bits ................................................... 141

Sample Clock Edge Control Bit................................. 139

Slave Frame Sync Operation .................................... 138

Slot Enable Bits Operation with Frame Sync ............ 140

Slot Status Bits.......................................................... 141

Synchronous Data Transfers .................................... 140

Timing Characteristics

AC-Link Mode ................................................... 207

Multichannel, I2S Modes ................................... 205

Timing Requirements

AC-Link Mode................................................... 207

Multichannel, I2S Modes................................... 206

Transmit Slot Enable Bits ......................................... 139

Transmit Status Bits.................................................. 141

Transmit/Receive Shift Register ............................... 135

Underflow Mode Control Bit...................................... 141

Word Size Selection Bits .......................................... 137

Demonstration Boards

PICDEM 1................................................................. 180

PICDEM 17............................................................... 180

PICDEM 18R PIC18C601/801.................................. 181

PICDEM 2 Plus......................................................... 180

PICDEM 3 PIC16C92X............................................. 180

PICDEM 4................................................................. 180

PICDEM LIN PIC16C43X ......................................... 181

PICDEM USB PIC16C7X5 ....................................... 181

PICDEM.net Internet/Ethernet .................................. 180

Development Support ....................................................... 177

Device Configuration

Device Configuration Registers

FBORPOR ................................................................ 166

FGS .......................................................................... 166

FOSC........................................................................ 166

FWDT ....................................................................... 166

Device Overview................................................................ 17

Disabling the UART .......................................................... 117

Divide Support .................................................................... 27

Instructions (Table) ..................................................... 27

DSP Engine ........................................................................ 28

Multiplier ..................................................................... 30

Dual Output Compare Match Mode .................................. 100

Continuous Pulse Mode............................................ 100

Single Pulse Mode.................................................... 100

Electrical Characteristics .................................................. 183

AC............................................................................. 195

DC ............................................................................ 184

Enabling and Setting Up UART

Alternate I/O ............................................................. 117

Setting Up Data, Parity and Stop Bit Selections ....... 117

Enabling the UART ........................................................... 117

Equations

A/D Conversion Clock............................................... 147

Baud Rate................................................................. 119

Bit Clock Frequency.................................................. 139

COFSG Period.......................................................... 137

Serial Clock Rate ...................................................... 112

Time Quantum for Clock Generation ........................ 129

Errata .................................................................................. 16

Evaluation and Programming Tools.................................. 181

Exception Processing ......................................................... 55

External Clock Timing Characteristics

Type A, B and C Timer ............................................. 201

External Clock Timing Requirements ............................... 196

Type A Timer ............................................................ 201

Type B Timer ............................................................ 202

Type C Timer ............................................................ 202

External Interrupt Requests ................................................ 60

DSPIC30F Datasheet(PDF) 240 Page - Microchip Technology

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