ICS843156AK REVISION B May 26, 2016

5

©2016 Integrated Device Technology, Inc.

ICS843156 Data Sheet

CRYSTAL-TO-LVPECL CLOCK SYNTHESIZER

AC Electrical Characteristics

Table 6A. AC Characteristics, VCC = VCCO = 3.3V ± 5%, VEE = 0V, TA = 0°C to 70°C

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE 1: This parameter is defined in accordance with JEDEC standard 65.

NOTE 2: Refer to phase noise plot.

Table 6B. AC Characteristics, VCC = VCCO = 2.5V ± 5%, VEE = 0V, TA = 0°C to 70°C

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE 1: This parameter is defined in accordance with JEDEC standard 65.

Table 6C. AC Characteristics, VCC = 3.3V ± 5%, VCCO = 2.5V ± 5%, VEE = 0V, TA = 0°C to 70°C

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE 1: This parameter is defined in accordance with JEDEC standard 65.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

fOUT

Output Frequency

156.25

MHz

tjit(cc)

Cycle-to-Cycle Jitter; NOTE 1

40

ps

tjit(Ø)

RMS Phase Jitter, (Random);

NOTE 2

156.25MHz, Integration Range:

1.875MHz - 20MHz

0.39

ps

tR / tF

Output Rise/Fall Time

20% to 80%

200

700

ps

odc

Output Duty Cycle

45

55

%

tLOCK

PLL Lock Time

100

ms

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

fOUT

Output Frequency

156.25

MHz

tjit(cc)

Cycle-to-Cycle Jitter; NOTE 1

35

ps

tjit(Ø)

RMS Phase Jitter, (Random)

156.25MHz, Integration Range:

1.875MHz - 20MHz

0.49

ps

tR / tF

Output Rise/Fall Time

20% to 80%

200

700

ps

odc

Output Duty Cycle

45

55

%

tLOCK

PLL Lock Time

100

ms

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

fOUT

Output Frequency

156.25

MHz

tjit(cc)

Cycle-to-Cycle Jitter; NOTE 1

40

ps

tjit(Ø)

RMS Phase Jitter, (Random)

156.25MHz, Integration Range:

1.875MHz - 20MHz

0.40

ps

tR / tF

Output Rise/Fall Time

20% to 80%

200

700

ps

odc

Output Duty Cycle

45

55

%

tLOCK

PLL Lock Time

100

ms