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INA234 Datasheet(PDF) 23 Page - Texas Instruments |
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INA234 Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 45 page  Table 7-10. Mask/Enable Register Field Descriptions (continued) Bit Field Type Reset Description 3 CVRF (Conversion Ready Flag) R 0b Although the device can be read at any time, and the data from the last conversion is available, the Conversion Ready Flag bit is provided to help coordinate one-shot or triggered conversions. The Conversion Ready Flag bit is set after all conversions, averaging, and multiplications are complete. Conversion Ready Flag bit clears under the following conditions: 1.) Writing to the Configuration Register (except for Power-Down selection) 2.) Reading the Mask/Enable Register 2 OVF (Math Over-flow) R 0b This bit is set to '1' if an arithmetic operation resulted in an overflow error. It indicates that current and power data may be invalid. 1 APOL (Alert Polarity) R/W 0b Alert Polarity bit sets the Alert pin polarity. 0b = Normal (Active-low open drain) 1b= Inverted (active-high ) 0 LEN (Alert Latch Enable) R/W 0b When the Alert Latch Enable bit is set to Transparent mode, the Alert pin and Alert Function Flag (AFF) bit resets to the idle states when the fault condition has been cleared. When the Alert Latch Enable bit is set to Latch mode, the Alert pin and AFF bit remains active following a fault until this register flag has been read. This bit must be set to use the I2C Alert Response function. 0b = Transparent 1b = Latched Alert pin Return to the Summary Table. 7.6.1.8 Alert Limit Register (Address = 7h) [reset = 0000h] The alert limit register is shown in Table 7-11. Table 7-11. Alert Limit Register Field Descriptions Bit Field Type Reset Description 15-0 LIMIT R/W 0000h The Alert Limit Register contains the value used to compare to the register selected in the Mask/Enable Register to determine if a limit has been exceeded. A two's complement value must be used for the Shunt Over Voltage limit. Limit values entered should match the format of the targeted register Return to the Summary Table. 7.6.1.9 Manufacturer ID Register (Address = 3Eh) [reset = 5449h] The manufacturer ID register is shown in Table 7-12. Table 7-12. MANUFACTURE_ID Register Field Descriptions Bit Field Type Reset Description 15-0 MANUFACTURE_ID R 5449h Reads back TI in ASCII Return to the Summary Table. 7.6.1.10 Device ID Register (Address = 3Fh) [reset = A480h] The Device ID register is shown in Table 7-13. www.ti.com INA234 SBOS844C – MAY 2021 – REVISED MARCH 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: INA234 |
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