PRELIMINARY TECHNICAL DATA

AD9910

Rev. PrD| Page 9 of 13

automatic), this device controls the OSK function. In manual mode, it toggles the multiplier

between 0 (low) and the programmed amplitude scale factor (high). In automatic mode, a

low sweeps the amplitude down to zero, a high sweeps the amplitude up to the amplitude

scale factor.

61

LS_OVER

0

Digital output (active high). Linear Sweep Over: Upon completion of a linear frequency

sweep, this flag will toggle high.

62

LSCTL

I

Digital input (active high). Linear Sweep Control: controls the direction of linear sweep

operation. A high will sweep the frequency from initial frequency to terminal frequency, a

low will sweep from the terminal frequency to the initial frequency.

63

LSHOLD

I

Digital input (active high). Linear Sweep Hold: this pin will stall a linear sweep operation

prior to reaching the final frequency (initial or terminal) during a rising or falling linear

sweep.

67

SDIO

I/O

Digital input/output (active high). Serial data input/output: this pin can be either uni-

directional or bidirectional (default), depending on configuration settings. In bidirectional

serial port mode, this pin acts as the serial data input and output. In unidirectional, it is an

input only.

68

SDO

O

Digital output (active high). Serial Data output: this pinis only active in unidirectional serial

data mode. In this mode, it functions as the output. In bidirectional mode, this pin is not

operational and should be left floating.

69

SCLK

O

Digital clock (rising edge on write, falling edge on read). Serial data clock: this pin provides

the serial data clock for the control data path. Write operations to the AD9910 use the

rising edge. Readback operations from the AD9910 use the falling edge.

70

CS

I

Ditial input (active low) Chip Select: This pin allows the AD9910 to operate on a common

serial bus for the control data path. Bringing this pin low enables the AD9910 to detect

serial clock rising/falling edges. Bringing this pin high will cause the AD9910 to ignore

input on the serial data pins.

71

I/O_RESET

I

Digital input (active high) I/O Reset: Rather than resetting the entire device during a failed

communication cycle, when brought high this pin will reset the state machine of the serial

port controller and clear any I/O buffers that have been written since the last I/O Update.

When unused, tie this pin to ground to avoid accidental resets.

80

IOUT

O

Analog output (current mode): Open source DAC complementary output source. Connect

through 50Ω to AGND.

81

IOUT

O

Analog output (current mode): Open source DAC output source. Connect through 50Ω to

AGND.

84

DAC_RSET

O

Analog reference pin: programs the DAC output full scale reference current. Attach a 10KΩ

resistor to AGND.

90

CLK

I

Analog input(active high): Reference CLK input. Can be driven by either an external

oscillator or a simple crystal when the internal oscillator is engaged.

91

CLK

I

Analog input(active high): Reference CLK input

94

XTAL_OUT

O

Analog output (active high). Crystal Output: Provides the output of the internal oscillator’s

response to a crystal.

95

XTAL_SEL

O

Analog input (active high). Crystal select: A high on this pin (AVDD) enables the internal

oscillator for clocking the part with a crystal.