6.4 KEYPAD SCANNING

The LM8333 starts new scanning cycles at fixed time inter-

vals of about 4 ms. If a change in the state of the keypad is

detected, the keypad is rescanned after a debounce delay.

When the state change has been reliably captured, it is

encoded and written to the FIFO buffer.

If more than two keys are pressed simultaneously, the pat-

tern of key closures may be ambiguous, so pressing more

than two keys asserts the Error Flag condition and the IRQ

output (if enabled). The host may attempt to interpret the

events stored in the FIFO or discard them.

The SF keys connect the WAKE_INx pins directly to ground.

There can be up to eight SF-keys. If any of these keys are

pressed, other key presses that use the same WAKE_INx

pin will be ignored.

6.5 COMMUNICATION INTERFACE

The two-wire ACCESS.bus interface is used to communicate

with a host. The ACCESS.bus interface is fully compliant

with the I

slave at speeds up to 400 kHz.

An ACCESS.bus transfer starts with a byte that includes a

7-bit slave device address. The LM8333 responds to a fixed

device address. This address is 0xA2, when aligned to the

MSB (7-bit address mapped to bits 7:1, rather than bits 6:0).

Bit 0 is a direction bit (0 on write, 1 on read).

Because it is a slave, the LM8333 never initiates an AC-

CESS.bus cycle, it only responds to bus cycles initiated by

the host. The LM8333 may signal events to the host by

asserting the IRQ interrupt request.

6.5.1 Interrupts Between the Host and LM8333

The IRQ output is used to signal unresolved interrupts,

errors, and key-events to the host.

The host can use an available GEN_IO_0 or GEN_IO_1 pin

to interrupt (or wake-up) the LM8333, if it is not being used

for another function. The host can also wake-up the LM8333

by sending a Start Condition on the ACCESS.bus interface.

Note: The LM8333 it will not be able to acknowledge the first byte received

from the host after wake-up. In this case, the host will have to resend

the slave address.

6.5.2 Interrupt Sources

The IRQ output is asserted on these conditions:

•

Any new key-event.

•

Any error condition, which is indicated by the error code.

•

Any enabled interrupt on either of the GEN_IO_0 or

GEN_IO_1 pins that can be configured as external inter-

rupt inputs. When enabled, any rising or falling edge

triggers an interrupt.

The IRQ output remains asserted until the interrupt code is

read.

7.0 Device Operation

7.1 EVENT CODE ASSIGNMENT

After power-on reset, the LM8333 starts scanning the key-

pad. It stays active for a default time of about 500 ms after

the last key is released, after which it enters a standby mode

Table 1 lists the codes assigned to the matrix positions

encoded by the hardware. Key-press events are assigned

the codes listed in Table 1, but with the MSB set. When a key

is released, the MSB of the code is clear.

TABLE 1. Keypad Matrix Code Assignments

K_OUT0

K_OUT1

K_OUT2

K_OUT3

K_OUT4

K_OUT5

K_OUT6

K_OUT7

SF Keys

WAKE_IN1

0x01

0x02

0x03

0x04

0x05

0x06

0x07

0x08

0x09

WAKE_IN2

0x11

0x12

0x13

0x14

0x15

0x16

0x17

0x18

0x19

WAKE_IN3

0x21

0x22

0x23

0x24

0x25

0x26

0x27

0x28

0x29

WAKE_IN4

0x31

0x32

0x33

0x34

0x35

0x36

0x37

0x38

0x39

WAKE_IN5

0x41

0x42

0x43

0x44

0x45

0x46

0x47

0x48

0x49

WAKE_IN6

0x51

0x52

0x53

0x54

0x55

0x56

0x57

0x58

0x59

WAKE_IN7

0x61

0x62

0x63

0x64

0x65

0x66

0x67

0x68

0x69

WAKE_IN8

0x71

0x72

0x73

0x74

0x75

0x76

0x77

0x78

0x79

The codes are loaded into the FIFO buffer in the order in

which they occurred. Table 2 shows an example sequence of

events, and Figure 2 shows the resulting sequence of event

codes loaded into the FIFO buffer.

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