CYUSB3015 datasheet(21/39 Pages) INFINEON

21 / 39 page

Document Number: 002-30704 Rev. *C

Page 20 of 38

CYUSB3015

CYUSB3016

CYUSB3017

VIH2

Input HIGH voltage 2

VCC – 0.4 VCC + 0.3

For 1.7 V

 VCC 2.0 V

(except USB port). VCC is the corresponding I/O

voltage supply.

VIL

Input LOW voltage–0.3

0.25 × VCC

VCC is the corresponding I/O voltage supply.

VOH

Output HIGH voltage

0.9 × VCC

–V

IOH (max) = -100 µA tested at quarter drive strength.

VCC is the corresponding I/O voltage supply. See

Table 7 for values of IOH at various drive strength

and VCC.

VOL

Output LOW voltage

–

0.1 × VCC

IOL (min) = +100 µA tested at quarter drive strength.

VCC is the corresponding I/O voltage supply. See

Table 7 for values of IOL measured at various drive

strength and VCC.

IIX

Input leakage current for all pins

except

SSTXP/SSXM/SSRXP/SSRXM

–1

µA

All I/O signals held at VDDQ

(For I/Os with a pull-up or pull-down resistor

connected, the leakage current increases by

VDDQ/Rpu or VDDQ/RPD)

IOZ

Output High-Z leakage current for

all pins except SSTXP/ SSXM/

SSRXP/SSRXM

–1

µA

All I/O signals held at VDDQ

ICC Core

Core and analog voltage

operating current

–

200

mA Total current through AVDD, VDD

ICC USB

USB voltage supply operating

current

–60

mA –

ISB1

Total suspend current during

suspend mode with USB 3.0 PHY

enabled (L1)

––

Core current: 1.5 mA

I/O current: 20 µA

USB current: 2 mA

For typical PVT (typical silicon, all power supplies

at their respective nominal levels at 25 °C)

ISB2

Total suspend current during

suspend mode with USB 3.0 PHY

disabled (L2)

––

Core current: 250 µA

I/O current: 20 µA

USB current: 1.2 mA

For typical PVT (Typical silicon, all power supplies

at their respective nominal levels at 25 °C)

ISB3

Total standby current during

standby mode (L3)

––

µA

Core current: 60 µA

I/O current: 20 µA

USB current: 40 µA

For typical PVT (typical silicon, all power supplies

at their respective nominal levels at 25 °C)

ISB4

Total standby current during core

power-down mode (L4)

––

µA

Core current: 0 µA

I/O current: 20 µA

USB current: 40 µA

For typical PVT (typical silicon, all power supplies

at their respective nominal levels at 25 °C)

VRAMP

Voltage ramp rate on core and I/O

supplies

0.2

V/ms Voltage ramp must be monotonic

Noise level permitted on VDD and

I/O supplies

–100

mV Max p-p noise level permitted on all supplies except

AVDD

VN_AVDD

Noise level permitted on AVDD

supply

–

mV Max p-p noise level permitted on AVDD

Table 6. DC Specifications (continued)

Parameter

Description

Min

Max

Unit

Notes

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