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QSMP Datasheet(PDF) 9 Page - List of Unclassifed Manufacturers |
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QSMP Datasheet(HTML) 9 Page - List of Unclassifed Manufacturers |
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9 / 17 page ![]() QSMP PIN QSCOM STANDARD MP1 PAD Alternate Function 0-3 Alternate Function 4-7 Alternate Function 8-11 Alternate Function 12-15 Remarks Additional functions 34 ENET_TXD1 PG14 TRACED1 LPTIM1_ETR - - - SPI6_MOSI SAI4_D1 USART6_TX - QUADSPI_BK2_IO3 SAI4_SD_A ETH1_RGMII_TXD1/ ETH1_RMII_TXD1 FMC_A25 - LCD_B0 EVENTOUT 35 ENET_TXD0 PG13 TRACED0 LPTIM1_OUT SAI1_CK2 - SAI4_CK1 SPI6_SCK SAI1_SCK_A USART6_CTS/USART6_NSS - - SAI4_MCLK_A ETH1_RGMII_TXD0/ ETH1_RMII_TXD0 FMC_A24 - LCD_R0 EVENTOUT SD 36 SD_CD PB7 - TIM17_CH1N TIM4_CH2 - I2C1_SDA - I2C4_SDA USART1_RX - - SDMMC2_D1 DFSDM1_CKIN5 FMC_NL DCMI_VSYNC - EVENTOUT 37 SD_D1 PC9 TRACED1 - TIM3_CH4 TIM8_CH4 I2C3_SDA I2S_CKIN - - UART5_CTS QUADSPI_BK1_IO0 - - SDMMC1_D1 DCMI_D3 LCD_B2 EVENTOUT 38 SD_D0 PC8 TRACED0 - TIM3_CH3 TIM8_CH3 - - UART4_TX USART6_CK UART5_RTS/UART5_DE - - - SDMMC1_D0 DCMI_D2 - EVENTOUT 39 SD_CLK PC12 TRACECLK MCO2 SAI4_D3 - - - SPI3_MOSI/I2S3_SDO USART3_CK UART5_TX - SAI4_SD_B - SDMMC1_CK DCMI_D9 - EVENTOUT 40 SD_CMD PD2 - - TIM3_ETR - I2C5_SMBA - UART4_RX - UART5_RX - - - SDMMC1_CMD DCMI_D11 - EVENTOUT 41 SD_D3 PC11 TRACED3 - - DFSDM1_DATIN5 - - SPI3_MISO/I2S3_SDI USART3_RX UART4_RX QUADSPI_BK2_NCS SAI4_SCK_B - SDMMC1_D3 DCMI_D4 - EVENTOUT 42 SD_D2 PC10 TRACED2 - - DFSDM1_CKIN5 - - SPI3_SCK/I2S3_CK USART3_TX UART4_TX QUADSPI_BK1_IO1 SAI4_MCLK_B - SDMMC1_D2 DCMI_D8 LCD_R2 EVENTOUT USB 43 USBA_VBUS Not connected 44 USBA_DN USB_ DM1 45 USBA_DP USB_ DP1 46 USBB_VBUS OTG_ VBUS 47 USBB_DN USB_ DM2 48 USBB_DP USB_ DP2 POWER SUPPLY & RESET 49 VIN 3.3V power supply input 50 51 NRST_PWREN This dual function pin is used as reset input and peripheral power supply enable output. NRST_PWREN is directly connected to STM32MP1 NRST and NRST_CORE and enables the DDR memory power supply VDD_DDR. 10nF capacitors on NRST and NRST_CORE protects the device against parasitic resets. The STM32MP1 has permanent internal pull-up resistors to 3.3V. Refer also to STM32MP1 datasheet, chap. 6.3.18 NRST and NRST_CORE pin characteristics. 52 BOOT_MODE H: Boot from FLASH L: Boot from UART/USB DISPLAY 53 LCD_DE CSI_DP2 LVDS1_TX2P PE13 HDP2 TIM1_CH3 - DFSDM1_CKIN5 - SPI4_MISO - - - - SAI2_FS_B - FMC_D10/FMC_DA10 DCMI_D6 LCD_DE EVENTOUT 54 LCD_VSYNC CSI_DN2 LVDS1_TX2N PI9 HDP1 - - - - - - - UART4_RX FDCAN1_RX - - - - LCD_VSYNC EVENTOUT 55 LCD_HSYNC CSI_DP0 LVDS1_TX0P PI10 HDP0 - - - - - - - USART3_CTS/USART3_NSS - - ETH1_GMII_RX_ER/ ETH1_MII_RX_ER - - LCD_HSYNC EVENTOUT Ka-Ro electronics GmbH - Pascalstr. 22, D-52076 Aachen, Germany - Tel.: +49 2408 1402-0 (FAX -10) www.karo-electronics.de |
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