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CY7C006
CY7C016
10
Notes:
26. I/O0R = I/O0L = LOW (request semaphore); CER = CEL = HIGH.
27. Semaphores are reset (available to both ports) at cycle start.
28. If tSPS is violated, the semaphore will definitely be obtained by one side or the other, but there is no guarantee which side will control the semaphore.
Switching Waveforms (continued)
MATCH
C006-16
tSPS
A0L–A2L
MATCH
R/WL
SEML
A0R–A2R
R/WR
SEMR
Semaphore Contention [26, 27, 28]
VALID
tDDD
tWDD
MATCH
MATCH
R/W R
DATA IN R
DATA OUTL
tWC
ADDRESSR
tPWE
VALID
tSD
tHD
ADDRESSL
tPS
tBLA
tBHA
tBDD
BUSYL
C006-17
Read with BUSY (M/S=HIGH)[19]
tPWE
R/W
BUSY
tWB
tWH
Write Timing with Busy Input (M/S=LOW)
C006-18