7.6 Typical Characteristics (continued)

at TA = 25°C, VS = (V+) – (V–) = 5.5 V, VIN = (VIN+) – (VIN–) = 0 V, RL = 10 kΩ, CL = 10 pF, VREF = VS / 2, VCM = [(VIN+) +

(VIN–)] / 2 = VS / 2, VOUT = VS / 2, VA_IN+ = VS / 2, VA_OUT = VA_IN- and G = 10 (unless otherwise noted)

Time (200 µs/div)

-1.5

-1

-0.5

0

0.5

1

1.5

TR05

VIN

VOUT

V+ = 2.75 V

V– = –2.75 V

VOUT = 2 VPP

Figure 7-37. Large Signal Step Response

Time (5µs/div)

TR14

V+ = 2.75 V

V– = –2.75 V

VOUT = 2 VPP

Figure 7-38. Large Signal Settling Time (Falling Edge)

Time (5µs/div)

TR13

V+ = 2.75 V

V– = –2.75 V

VOUT = 2 VPP

Figure 7-39. Large Signal Settling Time (Rising Edge)

Time (200 µs/div)

-0.075

-0.05

-0.025

0

0.025

0.05

0.075

TR07

VIN

VOUT

V+ = 2.75 V

V– = –2.75 V

VOUT = 0.1 VPP

Figure 7-40. Small-Signal Step Response

Time (10 µs/div)

-3

-1.5

0

1.5

3

4.5

TR11

VIN

VOUT

V+ = 2.75 V

V– = –2.75 V

VIN = 1 VPP

Figure 7-41. Over-Load Recovery (Rising Edge)

Time (10 µs/div)

-3

-1.5

0

1.5

3

4.5

TR11

VIN

VOUT

V+ = 2.75 V

V– = –2.75 V

VIN = 1 VPP

Figure 7-42. Over-Load Recovery (Falling Edge)

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SBOSAG2 – JUNE 2023

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